ADXL356 Просмотр технического описания (PDF) - Analog Devices

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ADXL356

Low Noise, Low Drift, Low Power, 3-Axis MEMS Accelerometers

Analog Devices 

Data Sheet

ADXL356/ADXL357

CS/SCL 1

11 VSUPPLY

Y

SCLK/VSSIO 2

ADXL357

10 V1P8ANA

TOP VIEW

MOSI/SDA 3

(Not to Scale)

9 VSS

X

MISO/ASEL 4

8 V1P8DIG

Z

Figure 7. ADXL357 Pin Configuration (SPI/I2C)

Table 9. ADXL357 Pin Function Descriptions

Pin No. Mnemonic

Description

1

CS/SCL

Chip Select for SPI (CS).

Serial Communications Clock for I2C (SCL).

2

SCLK/VSSIO

Serial Communications Clock for SPI (SCLK).

I2C Mode Enable (VSSIO). Connect this pin to Pin 6 (VSSIO) to enable I2C mode.

3

MOSI/SDA

Master Output, Slave Input for SPI (MOSI).

Serial Data for I2C (SDA).

4

MISO/ASEL

Master Input, Slave Output for SPI (MISO).

Alternate I2C Address Select for I2C (ASEL).

5

VDDIO

Digital Interface Supply Voltage.

6

VSSIO

Digital Ground.

7

RESERVED

Reserved. This pin can be connected to ground or left open.

8

V1P8DIG

Digital Supply. This pin requires a decoupling capacitor. If VSUPPLY connects to VSS, supply the voltage to this

pin externally.

9

VSS

Analog Ground.

10

V1P8ANA

Analog Supply. This pin requires a decoupling capacitor. If VSUPPLY connects to VSS, supply the voltage to this

pin externally.

11

VSUPPLY

Supply Voltage. When VSUPPLY equals 2.25 V to 3.6 V, VSUPPLY enables the internal LDO regulators to generate

V1P8DIG and V1P8ANA. For VSUPPLY = VSS, V1P8DIG and V1P8ANA are externally supplied.

12

INT1

Interrupt Pin 1.

13

INT2

Interrupt Pin 2.

14

DRDY

Data Ready Pin.

Rev. A | Page 11 of 42

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