S24163P2.7 Просмотр технического описания (PDF) - Summit Microelectronics
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S24163P2.7 Datasheet PDF : 12 Pages
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S24163
Acknowledge Polling
When the S24163 is performing an internal WRITE opera-
tion, it will ignore any new START conditions. Since the
device will only return an acknowledge after it accepts the
START, the part can be continuously queried until an
acknowledge is issued, indicating that the internal WRITE
cycle is complete.
To poll the device, give it a START condition, followed by
a slave address for a WRITE operation (See Figure 7).
READ OPERATIONS
Read operations are initiated with the R/W bit of the
identification field set to “1.” There are four different read
options:
Internal WRITE Cycle
In Progress;
Begin ACK Polling
Issue Start
Issue Slave
Address and
R/W = 0
Issue Stop
ACK
No
Returned?
Yes (Internal WRITE Cycle is completed)
Next
operation a No
WRITE?
Yes
Issue Byte
Address
Issue Stop
Proceed with
WRITE
Await Next
Command
1. Current Address Byte Read
2. Random Address Byte Read
3. Current Address Sequential Read
4. Random Address Sequential Read
Current Address Byte Read
The S24163 contains an internal address counter which
maintains the address of the last word accessed, incre-
mented by one. If the last address accessed (either a read
or write) was to address location n, the next read operation
would access data from address location n+1 and incre-
ment the current address pointer. When the S24163
receives the slave address field with the R/W bit set to “1,”
it issues an acknowledge and transmits the 8-bit word
stored at address location n+1.
The current address byte read operation only accesses a
single byte of data. The master does not acknowledge the
transfer, but does generate a stop condition. At this point,
the S24163 discontinues data transmission. See Figure 8
for the address acknowledge and data transfer sequence.
2014 ILL 9 1.0
FIGURE 7. ACKNOWLEDGE POLLING
2014 2.0 3/21/00
SDA Bus Activity 1
A
A AA RC
10 9 8 W K
Data Byte
1010
1
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
S
T
Device
Type
A Address
R
T
A10,A9,A8
Read/Write
1= Read
Slave Address
S
T
O
Lack of ACK (low) P
from Master
determines last
data byte to be read
Master sends Read
request to Slave
Master Transmitter
to
Slave Receiver
Slave sends
Data to Master
Slave Transmitter
to
Master Receiver
Shading Denotes
24163
SDA Output Active
2014 T fig08 2.0
FIGURE 8. CURRENT ADDRESS BYTE READ MODE
6
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