UPD78C11AGF(A)-XXX-3BE Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD78C11AGF(A)-XXX-3BE

8-BIT SINGLE-CHIP MICROCOMPUTER (WITH A/D CONVERTER)

NEC => Renesas Technology 

µPD78C10A(A), 78C11A(A), 78C12A(A)

Pin name

I/O

Function

MODE0

MODE1

I/O

In the µPD78C11A(A) and 78C12A(A), the MODE0 pin is set to “0” (low) and the MODE1

pin is set to “1” (high)(Note).

(Mode)

In the µPD78C10A(A), the MODE0 and MODE1 pins are used to select one of three external

memory sizes: 4 Kbytes, 16 Kbytes, or 64 Kbytes.

MODE0

MODE1

External memory

0

0

4 Kbytes

1

0

16 Kbytes

1

1

64 Kbytes

If MODE0 and MODE1 are both set to “1”(Note), a control signal is output synchronously

with ALE.

NMI

I

This is a falling edge-triggered nonmaskable interrupt input pin.

(Non-Maskable

Interrupt)

INT1

I

INT1 is a rising edge-triggered maskable interrupt input pin. It is also an AC-input, zero-

(Interrupt

cross detection pin.

Request)

AN7-0

I

These are eight analog inputs to the A/D converter. AN4 to AN7 can also be used as inputs

(Analog Input)

for falling edge detection.

VAREF

I

This pin can be used as a reference voltage input for the A/D converter or as a control

(Reference

pin for A/D converter operation.

Voltage)

AVDD

This is the power supply pin for the A/D converter.

(Analog VDD)

AVSS

This is the ground pin for the A/D converter.

(Analog VSS)

X1, X2

These are the crystal pins for the system clock oscillator. X1 inputs an external clock. 5

(Crystal)

X2 inputs the inverted clock from X1.

RESET

I

This is the system reset input pin (active low).

(Reset)

STOP

I

This is the control signal input pin during hardware STOP mode. Low-level input stops

(Stop)

the system clock oscillator.

VDD

Positive power supply pin

VSS

Ground pin

Note These must be pulled up using a pull-up resistance value (R) of 4 (kΩ) ≤ R ≤ 0.4 tCYC (kΩ). (tCYC is in

ns units.)

Remark On-chip pull-up resistors for Ports A, B, and C are available as mask options on theµPD78C11A(A)

or 78C12A(A).

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