IS61LPS25632J Просмотр технического описания (PDF) - Integrated Silicon Solution

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Компоненты Описание

производитель

IS61LPS25632J

256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINED, SINGLE-CYCLE DESELECT STATIC RAM

Integrated Silicon Solution 

IS61LPS25632T/D/J, IS61LPS25636T/D/J, IS61LPS51218T/D/J

WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)

Symbol Parameter

tKC

Cycle Time

tKH

Clock High Pulse Width

tKL

Clock Low Pulse Width

tAS

Address Setup Time

tSS

Address Status Setup Time

tWS Write Setup Time

tDS

Data In Setup Time

tCES Chip Enable Setup Time

tAVS Address Advance Setup Time

tAH

Address Hold Time

tSH

Address Status Hold Time

tDH

Data In Hold Time

tWH Write Hold Time

tCEH Chip Enable Hold Time

tAVH Address Advance Hold Time

-166

Min. Max.

6

—

2.3 —

2.3 —

1.5 —

1.5 —

1.5 —

1.5 —

1.5 —

1.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

-200

Min. Max.

5

—

2

—

2

—

1.4 —

1.4 —

1.4 —

1.4 —

1.4 —

1.4 —

0.4 —

0.4 —

0.4 —

0.4 —

0.4 —

0.4 —

-225

Min. Max

4.4 —

1.8 —

1.8 —

1.4 —

1.4 —

1.4 —

1.4 —

1.4 —

1.4 —

0.4 —

0.4 —

0.4 —

0.4 —

0.4 —

0.4 —

®

ISSI

-250

Min. Max

Unit

4

—

ns

1.7 —

ns

1.7 —

ns

1.2 —

ns

1.2 —

ns

1.2 —

ns

1.2 —

ns

1.2 —

ns

1.2 —

ns

1.2 —

ns

0.3 —

ns

0.3 —

ns

0.3 —

ns

0.3 —

ns

0.3 —

ns

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

17

PRELIMINARYINFORMATION Rev. 00B

04/29/02

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