IDT72V81L15PAG Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72V81L15PAG

3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO

Integrated Device Technology 

IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO

512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9

Q0-Q8

Q9-Q17

Q0-Q8

Q9-Q17

R, W, RS

IDT

72V81/72V82/72V83

72V84/72V85

DEPTH

EXPANSION

BLOCK

IDT

72V81/72V82/72V83

72V84/72V85

DEPTH

EXPANSION

BLOCK

D0-DN

D0-D8

D9-D17

NOTES:

D9-DN

1. For depth expansion block see section on Depth Expansion and Figure 14.

2. For Flag detection see section on Width Expansion and Figure 13.

D18-DN

Figure 15. Compound FIFO Expansion

COMMERCIAL TEMPERATURE RANGE

Q(N-8)-QN

Q(N-8)-QN

IDT

72V81/72V82/72V83

72V84/72V85

DEPTH

EXPANSION

BLOCK

D(N-8)-DN

D(N-8)-DN

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SIDE 1

DATA IN

W

R

EF

DATA OUT

WA

FFA

DA 0-8

QB 0-8

FIFIDOTA

7201A

IDT

72V81

72V82

72V83

72V84

72V85

RA

EFA

HFA

QA 0-8

DA 0-8

SIDE 2

RB

FIFO B

WB

HFB

EFB

FFB

Figure 16. Bidirectional FIFO Mode

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tRPE

tWLZ

tWEF

tA

tREF

DATA OUT VALID

Figure 17. Read Data Flow-Through Mode

10

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JULY 17, 2006

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