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IDT54FCT807BTD

FAST CMOS 1-TO-10 CLOCK DRIVER

Integrated Device Technology 

IDT54/74FCT807BT/CT

FAST CMOS 1-TO-10 CLOCK DRIVER

TEST WAVEFORMS

PACKAGE DELAY

INPUT

OUTPUT

tPLH

tR

MILITARY AND COMMERCIAL TEMPERATURE RANGES

tPHL

tF

3V

1.5V

0V

VOH

2.0V

1.5V

0.8V VOL

3017 drw 09

OUTPUT SKEW- tSK(o)

INPUT

OUTPUT 1

OUTPUT 2

tPLH1

tPHL1

tSK(o)

tSK(o)

tPLH2

tPHL2

3V

1.5V

0V

VOH

1.5V

VOL

VOH

1.5V

VOL

tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|

3017 drw 10

PULSE SKEW - tSK(p)

PACKAGE SKEW - tSK(t)

INPUT

OUTPUT

tPLH

tPHL

tSK(p) = |tPHL - tPLH|

ENABLE AND DISABLE TIMES

3V

1.5V

0V

VOH

1.5V

VOL

INPUT

PACKAGE 1 OUTPUT

PACKAGE 2 OUTPUT

tPLH1

tPHL1

tSK(t)

tSK(t)

tPLH2

tPHL2

3V

1.5V

0V

VOH

1.5V

VOL

VOH

1.5V

VOL

3017 drw 11

tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|

Package 1 and Package 2 are same device type and speed grade

3017 drw 12

ENABLE

DISABLE

CONTROL

INPUT

OUTPUT

NORMALLY

LOW

t PZL

SWITCH

CLOSED

t PZH

3.5V

1.5V

t PLZ

t PHZ

0.3V

3V

1.5V

0V

3.5V

VOL

OUTPUT SWITCH

NORMALLY

HIGH

OPEN

1.5V

0V

0.3V VOH

0V

3017 drw 13

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control

Disable-HIGH

2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

9.3

6

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