Q67100-Q1051 Просмотр технического описания (PDF) - Siemens AG

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Q67100-Q1051

4M x 4-Bit Dynamic RAM

Siemens AG 

4M x 4-Bit Dynamic RAM

HYB5116400BJ -50/-60/-70

HYB5116400BT -50/-60/-70

Advanced Information

• 4 194 304 words by 4-bit organization

• 0 to 70 °C operating temperature

• Performance:

tRAC

tCAC

tAA

tRC

tPC

RAS access time

CAS access time

Access time from address

Read/Write cycle time

Fast page mode cycle time

-50 -60 -70

50 60 70 ns

13 15 20 ns

25 30 35 ns

90 110 130 ns

35 40 45 ns

• Single + 5 V (± 10 %) supply

• Low power dissipation

max. 550 active mW (-50 version)

max. 495 active mW (-60 version)

max. 440 active mW (-70 version)

11 mW standby (TTL)

5.5. mW standby (MOS)

• Output unlatched at cycle end allows two-dimensional chip selection

• Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh,

self refresh and test mode

• Fast page mode capability

• All inputs, outputs and clocks fully TTL-compatible

• 4096 refresh cycles / 64 ms

• Plastic Package:

P-SOJ-26/24 300 mil

P TSOPII-26/24 300 mil

Semiconductor Group

1

1.96

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