NCV8851-1DBR2G Просмотр технического описания (PDF) - ON Semiconductor

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NCV8851-1DBR2G

Automotive Grade Synchronous Buck Controller

ON Semiconductor 

NCV8851−1

Careful selection and layout of external components is

required to realize the full benefit of the onboard drivers.

The capacitors between VIN and GND and between BST

and VSW must be placed as close as possible to the IC. The

current paths for the GH and GL connections must be

optimized, minimizing parasitic resistance and inductance.

Current Limiting and Overcurrent Protection

The NCV8851−1 contains average current limiting

(ACL) and cycle−by−cycle overcurrent protection (OCP) to

protect the power switches, inductor, current sense resistor

and other external components. The current through the

inductor is continuously sensed using the CSP and CSN

pins. A sense resistor is placed between these pins to

translate the output current to a proportional voltage. This

voltage is compared to a fixed internal voltage threshold.

When the differential voltage exceeds the ACL threshold,

the PWM pulse is terminated for this cycle, limiting the

current through the inductor. In steady−state operation,

decreasing the load resistance while in ACL will cause the

duty cycle and VOUT to decrease proportionally without

skipping pulses or jitter.

There is also a fast OCP path which is tripped when the

differential voltage exceeds the OCP threshold, which is

above the ACL threshold. This causes the PWM pulse to be

terminated very quickly and disables the part from switching

back on until the current through the inductor has dropped

below the OCP threshold. Once the inductor current is below

the OCP threshold, the part will begin switching again and

the current will be limited by ACL, until the inductor current

drops below the ACL threshold.

An advantage of this current limiting scheme is that the

NCV8851−1 will limit large transient currents yet resume

normal operation on the following cycle. Additionally, the

current will not run away, nor will the part latch off in case

of a short, which is typical of other current limiting schemes

employing high−side current sensing.

SYNC Feature

An external clock signal can synchronize the NCV8851−1

to a higher frequency. The rising edge of the SYNC pulse

turns on the power switch to start a new switching cycle, as

shown in Figure 24. There is a 0.5 ms delay between the

rising edge of the SYNC pulse and rising edge of the VSW

pin voltage. The SYNC threshold is TTL logic compatible,

and duty cycle of the SYNC pulses can vary from 10% to

90%. The SYNC frequency must be higher than the internal

oscillator frequency set by ROSC.

Figure 24. Synchronization from 170 kHz to an external 600 kHz signal

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