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LZ93B53 Просмотр технического описания (PDF) - Sharp Electronics

Номер в каталоге
Компоненты Описание
производитель
LZ93B53
Sharp
Sharp Electronics Sharp
LZ93B53 Datasheet PDF : 6 Pages
1 2 3 4 5 6
LZ93B53
PIN FUNCTION
10.
r~ ‘DWL
‘f ~
‘uwn’ ‘ ‘
r,,. ,.m,v, L
1
CLKI
Ic
m
Main clock
2
CLKO
o
3
lVMD
ICD
lrf
Clock out
TV mode select
4
CPMD
Icu
Clamp pulse mode
select
5
CKMD
Icu
Clock mode select
6
VRI
Icsu u
Vertical reset
7
TSTI
ICD
Test tarminal 1
, “,.”, ,”,.
This is a pin to input the clock which is used as
the reference of the horizontal and vertical pulses.
This pin should be connected to DO on the timing
LSI. The frequency varies depending on CKMD (pin
5) as follows.
q EIA system
270000 pixels fck : 9.534964 MHz(606 fH)
360000 pixels fck : 12.713285 MHz(808 fH)
. CCIR system
320000 pixels fck : 9,656250 MHz(6I 8 fH)
420 MO pixels fck : 12.875000 MHz(824 fH)
This is an inverted output pin for CLKI (pin 1).
This is a pin to select TV systems.
q L o w level : EIA system
q High level : CCIR system
This is a pin to control stop and continuance of
BCPI (pin 10) within the vertical blanking period.
q High level : BCPI outputs continuous pulses.
q Low level : BCP I stops outputting composite
pulses while there is no effective
pixel within the V blanking period.
This is an input pin to switch the frequency devision
in accordance with the area sensor as follows.
Frequency division
output
CKMD
Number of pixels
1/3
High
270000
1/4
Low
360000
This is an input pin for the external V reset pulse
which is used to apply vertical synchronization to
the counter (2 fck counter) on the synchronization.
This resetting takes priority over the internal reset-
ting. Since the rise of input at VRI is taken at the
horizontal synchronous frequency (2 fH) which is two
times as high as the internal frequency, when the
vertical pulses which were separated in terms of
frequency from the composite synchronous signal
from other equipment are used, the fall must have
a phase difference of less than 1/2 fH compared
with the start timing of the vertical synchronous
signal. When the interal synchronization is obtained,
the High level should be selected. The input is de-
signed as a schmitt trigger buffer.
This is an input pin for tests, Typically, this pin
should be open or at the Low level.
252

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