VIPER50B Просмотр технического описания (PDF) - STMicroelectronics

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VIPER50B

SMPS PRIMARY I.C.

STMicroelectronics 

VIPER50B/BSP

frequency source. Figure 20 shows one possible

schematic to be adapted depending the specific

needs. If the proposed schematic is used, the

pulse duration must be kept at a low value (500ns

is sufficient) for minimizing consumption. The

optocoupler must be able to provide 20mA

through the optotransistor.

PRIMARY PEAK CURRENT LIMITATION

The primary IDPEAK current and, as resulting

effect, the output power can be limited using the

simple circuit shown in figure 21. The circuit

based on Q1, R1 and R2 clamps the voltage on

the COMP pin in order to limit the primary peak

current of the device to a value:

IDPEAK

=

VCOMP−

HID

0.5

where:

VCOMP

=

0.6

x

R1 + R2

R2

The suggested value for R1+R2 is in the range of

220KΩ.

OVER-TEMPERATURE PROTECTION:

Over-temperature protection is based on chip

temperature sensing. The minimum junction

temperature at which over-temperature cut-out

occurs is 140oC while the typical value is 160oC.

The device is automatically restarted when the

junction temperature decreases to the restart

temperature threshold that is typically 40oC below

Figure 18: Typical Compensation Network

Figure 19: Slope Compensation

VDD

-

OSC

13V +

VIPer50B

DRAIN

COMP SOURCE

C2 R 1

C1

FC00351

Figure 20:External Clock Synchronization

R2 R1

VIPer50B

VD D

-

OSC

13V +

DRAIN

COMP S OURCE

C2

Q1

C3

C1 R3

FC00361

Figure 21:Current Limitation Circuit Example

10 kΩ

VIPer50B

VDD

-

OSC

13V +

DRAIN

COMP SOURCE

FC00 370

VDD

-

O SC

13V +

VIPer50B

D RAIN

COMP SOURCE

R1

Q1

R2

FC003 80

15/20

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