Z80195_ Просмотр технического описания (PDF) - Zilog

Номер в каталоге

Компоненты Описание

производитель

Z80195_

Family MPU

Zilog 

Z8018x Family

MPU User Manual

xii

Software Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

Figure 74. CPU Register Configurations . . . . . . . . . . . . . . . . . . . . . 176

Figure 75. Register Direct — Bit Field Definitions . . . . . . . . . . . . . 181

Figure 76. Register Indirect Addressing . . . . . . . . . . . . . . . . . . . . . . 181

Figure 77. Indexed Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

Figure 78. Extended Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182

Figure 79. Immediate Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . 183

Figure 80. Relative Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183

Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197

Figure 81. AC Timing Diagram 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 197

Figure 82. AC Timing Diagram 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 198

Figure 83. CPU Timing (IOC = 0) (I/O Read Cycle,

I/O Write Cycle) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

Figure 84. DMA Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 200

Figure 85. E Clock Timing (Memory R/W Cycle) (I/O R/W Cycle) 201

Figure 86. E Clock Timing (BUS RELEASE Mode, SLEEP Mode, and

SYSTEM STOP Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 201

Figure 87. EClockTiming(MinimumTimingExampleofPWELandPWEH)

202

Figure 88. Timer Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202

Figure 89. SLP Execution Cycle Timing Diagram . . . . . . . . . . . . . . 203

Figure 90. CSI/O Receive/Transmit Timing Diagram . . . . . . . . . . . 204

Figure 91. External Clock Rise Time and Fall Time . . . . . . . . . . . . 204

Figure 92. Input Rise Time and Fall Time

(Except EXTAL, RESET) . . . . . . . . . . . . . . . . . . . . . . . . 204

Figure 93. Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205

UM005001-ZMP0400

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