M5M5256DFP-85VLL-I Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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M5M5256DFP-85VLL-I Datasheet PDF : 7 Pages
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'97.4.7
(4) TIMING DIAGRAMS
Read cycle
A0~14
MITSUBISHI LSIs
M5M5256DFP,VP,RV -70VLL-I,-85VLL-I,
-70VXL-I,-85VXL-I
262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM
tCR
ta(A)
tv (A)
/S
/OE
(Note 3)
(Note 3)
ta (S)
ta (OE)
ten (OE)
ten (S)
tdis (S)
(Note 3)
tdis (OE)
(Note 3)
DQ1~8
/W = "H" level
DATA VALID
Write cycle (/W control mode)
tCW
A0~14
/S
/OE
/W
DQ1~8
(Note 3)
tsu (S)
tsu (A-WH)
tsu (A)
tw (W)
trec (W)
tdis (OE)
(Note 3)
tdis (W)
ten(OE)
ten (W)
DATA IN
STABLE
tsu (D) th (D)
(Note 3)
(Note 3)
MITSUBISHI
ELECTRIC
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