LTC1665 Просмотр технического описания (PDF) - Linear Technology

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Компоненты Описание

производитель

LTC1665

Micropower Octal 8-Bit and 10-Bit DACs

Linear Technology 

LTC1665/LTC1660

PIN FUNCTIONS (LTC1665/LTC1660)

GND (Pin 1): System Ground.

VOUT A to VOUT H (Pins 2-5 and 12-15): DAC Analog Volt-

age Outputs. The output range is

0

to

⎛

⎝⎜

255⎞

256 ⎠⎟

VREF

for

the

LTC1665

0

to

⎛

⎝⎜

1023⎞

1024 ⎠⎟

VREF

for

the

LTC1660

REF (Pin 6): Reference Voltage Input. 0V ≤ VREF ≤ VCC.

CS/LD (Pin 7): Serial Interface Chip Select/Load Input.

When CS/LD is low, SCK is enabled for shifting data on

DIN into the register. When CS/LD is pulled high, SCK is

disabled and data is loaded from the shift register into the

specified DAC register(s), updating the analog output(s).

CMOS and TTL compatible.

SCK (Pin 8): Serial Interface Clock Input. CMOS and TTL

compatible.

DIN (Pin 9): Serial Interface Data Input. Data on the DIN

pin is shifted into the 16-bit register on the rising edge of

SCK. CMOS and TTL compatible.

DOUT (Pin 10): Serial Interface Data Output. Data appears

on DOUT 16 positive SCK edges after being applied to DIN.

May be tied to DIN of another LTC1665/LTC1660 for daisy-

chain operation. CMOS and TTL compatible.

CLR (Pin 11): Asynchronous Clear Input. All internal shift

and DAC registers are cleared to zero at the falling edge of

the CLR signal, forcing the analog outputs to zero scale.

CMOS and TTL compatible.

VCC (Pin 16): Supply Voltage Input. 2.7V ≤ VCC ≤ 5.5V.

BLOCK DIAGRAM

GND 1

VOUT A 2

DAC A

DAC H

16 VCC

15 VOUT H

VOUT B 3

DAC B

DAC G

14 VOUT G

VOUT C 4

DAC C

DAC F

13 VOUT F

8

VOUT D 5

REF 6

CS/LD 7

SCK 8

DAC D

DAC E

CONTROL

LOGIC

ADDRESS

DECODER

SHIFT REGISTER

12 VOUT E

11 CLR

10 DOUT

9 DIN

166560 BD

166560fa

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