CY7C1041BNV33(2011) Просмотр технического описания (PDF) - Cypress Semiconductor

Номер в каталоге

Компоненты Описание

производитель

CY7C1041BNV33
(Rev.:2011)

256 K × 16 Static RAM

Cypress Semiconductor 

CY7C1041BNV33

Switching Waveforms (continued)

Write Cycle No. 1 (CE Controlled)[15, 16]

tWC

ADDRESS

CE

WE

BHE, BLE

DATAI/O

tSA

tSCE

tAW

tPWE

tBW

tSD

Write Cycle No. 2 (BLE or BHE Controlled)

tWC

ADDRESS

BHE, BLE

WE

CE

DATAI/O

tSA

tAW

tBW

tPWE

tSCE

tSD

tHA

tHD

tHA

tHD

Notes

15. Data I/O is high-impedance if OE or BHE and/or BLE= VIH.

16. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high–impedance state.

Document #: 001-06434 Rev. *C

Page 8 of 14

[+] Feedback

Share Link: