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N80960SB-10 Просмотр технического описания (PDF) - Intel

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N80960SB-10 Datasheet PDF : 38 Pages
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80960SB
REGISTER
ONE OF FOUR CACHE
LOCAL
REGISTER SETS
LOCAL REGISTER SET
r0
31
0 r15
Figure 4. Multiple Register Sets Are Stored On-Chip
1.1.7 Floating-Point Arithmetic
In the 80960SB, floating-point arithmetic has been
made an integral part of the architecture. Having the
floating-point unit integrated on chip provides two
advantages. First, it improves the performance of the
chip for floating-point applications, since no
additional bus overhead is associated with floating-
point calculations, thereby leaving more time for
other bus operations such as I/O. Second, the cost of
using floating-point operations is reduced because a
separate coprocessor chip is not required.
The 80960SB floating-point (real-number) data types
include single-precision (32-bit), double-precision
(64-bit) and extended precision (80-bit) floating-point
numbers. Any registers may be used to execute
floating-point operations.
The processor provides hardware support for both
mandatory and recommended portions of IEEE
Standard 754 for floating-point arithmetic, including
all arithmetic, exponential, logarithmic and other
transcendental functions. Table 3 shows execution
times for some representative instructions.
1.1.8 High Bandwidth Bus
The 80960SB CPU resides on a high-bandwidth
address/data bus. The bus provides a direct commu-
nication path between the processor and the
Table 3. Sample Floating-Point Execution Times
(µs) at 16 MHz
Function
Add
Subtract
Multiply
Divide
32-Bit
0.6
0.6
1.1
2.0
64-Bit
0.8
0.8
2.0
4.5
Square Root
5.8
6.1
Arctangent
15.8
20.5
Exponent
17.7
19.5
Sine
23.8
25.9
Cosine
23.8
25.9
memory and I/O subsystem interfaces. The
processor uses the bus to fetch instructions,
manipulate memory and respond to interrupts. Bus
features include:
• 16-bit data path multiplexed onto the lower bits of
the 32-bit address path
• Eight 16-bit half-word burst capability which
allows transfers from 1 to 16 bytes at a time
• High bandwidth reads and writes with
25.6 MBytes/s burst (at 16 MHz)
Table 4 defines bus signal names and functions;
Table 5 defines other component-support signals
such as interrupt lines.
6

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