HD6433024F Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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Компоненты Описание

производитель

HD6433024F

Hitachi Single-Chip Microcomputer

Hitachi -> Renesas Electronics 

Tables

Table 1.1

Table 1.2

Table 1.3

Table 1.4

Table 2.1

Table 2.2

Table 2.3

Table 2.4

Table 2.5

Table 2.6

Table 2.7

Table 2.8

Table 2.9

Table 2.10

Table 2.11

Table 2.12

Table 2.13

Table 2.14

Table 3.1

Table 3.2

Table 3.3

Table 3.4

Table 4.1

Table 4.2

Table 5.1

Table 5.2

Table 5.3

Table 5.4

Table 5.5

Table 6.1

Table 6.2

Table 6.3

Table 6.4

Table 6.5

Table 7.1

Table 7.2

Table 7.3

Table 7.4

Table 7.5

Table 7.6

Table 7.7

Table 7.8

xxii

Features ................................................................................................................. 2

Comparison of H8/3024 Series Pin Arrangements ............................................... 7

Pin Functions......................................................................................................... 10

Pin Assignments in Each Mode (FP-100B or TFP-100B, FP-100A) ................... 14

Instruction Classification ...................................................................................... 29

Instructions and Addressing Modes ...................................................................... 30

Data Transfer Instructions ..................................................................................... 32

Arithmetic Operation Instructions ........................................................................ 33

Logic Operation Instructions ................................................................................ 35

Shift Instructions ................................................................................................... 35

Bit Manipulation Instructions................................................................................ 36

Branching Instructions .......................................................................................... 38

System Control Instructions.................................................................................. 39

Block Transfer Instruction .................................................................................... 40

Addressing Modes................................................................................................. 43

Absolute Address Access Ranges ......................................................................... 44

Effective Address Calculation............................................................................... 46

Exception Handling Types and Priority................................................................ 50

Operating Mode Selection .................................................................................... 57

Registers................................................................................................................ 58

Pin Functions in Each Mode ................................................................................. 63

Address Maps in Mode 5 ...................................................................................... 64

Exception Types and Priority................................................................................ 69

Exception Vector Table ........................................................................................ 71

Interrupt Pins ......................................................................................................... 83

Interrupt Controller Registers ............................................................................... 83

Interrupt Sources, Vector Addresses, and Priority................................................ 94

UE, I, and UI Bit Settings and Interrupt Handling................................................ 97

Interrupt Response Time ....................................................................................... 103

Bus Controller Pins ............................................................................................... 109

Bus Controller Registers ....................................................................................... 110

Bus Specifications for Each Area (Basic Bus Interface) ...................................... 124

Data Buses Used and Valid Strobes...................................................................... 128

Pin States in Idle Cycle ......................................................................................... 141

Port Functions ....................................................................................................... 147

Port 1 Registers ..................................................................................................... 151

Port 2 Registers ..................................................................................................... 155

Input Pull-Up Transistor States (Port 2)................................................................ 157

Port 3 Registers ..................................................................................................... 158

Port 4 Registers ..................................................................................................... 161

Input Pull-Up Transistor States (Port 4)................................................................ 163

Port 5 Registers ..................................................................................................... 164

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