HD6433024F Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

Номер в каталоге

Компоненты Описание

производитель

HD6433024F

Hitachi Single-Chip Microcomputer

Hitachi -> Renesas Electronics 

Figure 11.5

Figure 11.6

Figure 11.7

Figure 11.8

Figure 12.1

Figure 12.2

Figure 12.3

Figure 12.4

Figure 12.5

Figure 12.6

Figure 12.7

Figure 12.8

Figure 12.9

Figure 12.10

Figure 12.11

Figure 12.12

Figure 12.13

Figure 12.14

Figure 12.15

Figure 12.16

Figure 12.17

Figure 12.18

Figure 12.19

Figure 12.20

Figure 12.21

Figure 12.22

Figure 12.23

Figure 12.24

Figure 13.1

Figure 13.2

Figure 13.3

Figure 13.4

Figure 13.5

Figure 13.6

Figure 13.7

Figure 13.8

xviii

Interval Timer Operation...................................................................................... 340

Timing of Setting of OVF .................................................................................... 340

Timing of Setting of WRST Bit and Internal Reset ............................................. 341

Contention between TCNT Write and Count up.................................................. 342

SCI Block Diagram .............................................................................................. 345

Data Format in Asynchronous Communication

(Example: 8-Bit Data with Parity and 2 Stop Bits).............................................. 373

Phase Relationship between Output Clock and Serial Data

(Asynchronous Mode).......................................................................................... 375

Sample Flowchart for SCI Initialization .............................................................. 376

Sample Flowchart for Transmitting Serial Data .................................................. 377

Example of SCI Transmit Operation in Asynchronous Mode

(8-Bit Data with Parity and One Stop Bit) ........................................................... 378

Sample Flowchart for Receiving Serial Data ....................................................... 379

Example of SCI Receive Operation (8-Bit Data with Parity and One Stop Bit).. 382

Example of Communication among Processors using Multiprocessor Format

(Sending Data H'AA to Receiving Processor A).................................................. 383

Sample Flowchart for Transmitting Multiprocessor Serial Data ......................... 384

Example of SCI Transmit Operation

(8-Bit Data with Multiprocessor Bit and One Stop Bit)....................................... 385

Sample Flowchart for Receiving Multiprocessor Serial Data.............................. 386

Example of SCI Receive Operation

(8-Bit Data with Multiprocessor Bit and One Stop Bit)....................................... 388

Data Format in Synchronous Communication ..................................................... 389

Sample Flowchart for SCI Initialization .............................................................. 390

Sample Flowchart for Serial Transmitting ........................................................... 391

Example of SCI Transmit Operation.................................................................... 392

Sample Flowchart for Serial Receiving................................................................ 393

Example of SCI Receive Operation ..................................................................... 395

Sample Flowchart for Simultaneous Serial Transmitting and Receiving ............ 396

Receive Data Sampling Timing in Asynchronous Mode ..................................... 399

Example of Synchronous Transmission ............................................................... 400

Operation when Switching from SCK Pin Function to Port Pin Function........... 401

Operation when Switching from SCK Pin Function to Port Pin Function

(Example of Preventing Low-Level Output)........................................................ 402

Block Diagram of Smart Card Interface .............................................................. 404

Smart Card Interface Connection Diagram .......................................................... 412

Smart Card Interface Data Format ....................................................................... 413

Timing of TEND Flag Setting.............................................................................. 419

Sample Transmission Processing Flowchart........................................................ 420

Relation Between Transmit Operation and Internal Registers ............................. 421

Timing of TEND Flag Setting.............................................................................. 421

Sample Reception Processing Flowchart ............................................................. 422

Share Link: