BTW67 Просмотр технического описания (PDF) - New Jersey Semiconductor

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производитель

BTW67

STANDARD 50A SCRs

New Jersey Semiconductor 

BTW67 and BTW69 Series

Fig. 1: Maximum average power dissipation

versus average on-state current.

P(W)

50 = 180

45

40

35

30

25

20

15

10

5

ff

0

)

5

10

T(av)(A

15 20

360" •\

25 30 3

Fig. 2: Average and D.C. on-state current versus

case temperature.

IT(av)(A)

60

D.C

50

40

30

20

10

25

X s BTW69

X - BlT/V67

s

B"nW67

^vs-

Xs

^

^•» *SS^V

Teas 5(°C)

b

^\

50

75

100

125

Fig. 3: Relative variation of thermal impedance

versus pulse duration.

Fig. 4: Relative variation of gate trigger current,

holding current and latching current versus

junction temperature.

K = [Zth/Rth]

1E+0

— 14Hi—

^

1E-1

m

II-HI

<

f'

1E-2

1E-3

1E-3

.•

tr (st

II Illl

1E-2

1 E-1 1 E+0 1E+1 1E+2 5E

IGT, IH, IL[Tj] / IGT, IH, IL[Tj = 25°C]

-20 0 20 40 60 80 100 120 140

Fig. 5: Surge peak on-state current versus

number of cycles.

TSM A)

BOO

550

500

4bO

—

400

350

300

dbU

200

150

100

Re pe lit *

Tr.i se= 7.

50

0

-

'-

~

peti \

- - Tj initit T - r 5'i

.,

~

10

-'.

'-••^-*. i

"I k ; :

aer Of c /C\€

100

tp=10ms

-c)n B e y de;

= :.

10

Fig. 6: Non-repetitive surge peak on-state

current for a sinusoidal pulse with width

tp < 10ms, and corresponding value of I2t.

ITSM(A), !2t(A2s)

sooo

-Tjin tial 5

^^

1000

~ - imitation

• ii ^_

I2t

V,

_• =.

100

0.01

tp( ms>)

I

0.10

1.00

10.00

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