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ISL6432CB Просмотр технического описания (PDF) - Renesas Electronics

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ISL6432CB Datasheet PDF : 12 Pages
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ISL6432
than the output capacitance of the pull-down device, has to be
used in parallel with ROCSET (1nF recommended). Upon turn-
off of the pull-down device, the switching regulator undergoes
a soft-start cycle.
FZ1
FZ2 FP1 FP2
OPEN LOOP
100
ERROR AMP GAIN
80
20
log
V-V----P-I--N-P---
60
40
COMPENSATION
GAIN
20
0
-20
20
log
-R-R----S--2--1--
MODULATOR
-40
GAIN
FLC FESR
CLOSED LOOP
GAIN
-60
10
100
1K
10K 100K 1M 10M
FREQUENCY (Hz)
FIGURE 6. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
Important
If the collector voltage to a linear regulator pass transistor (Q3,
Q4, or Q5) is lost, the respective regulator has to be shut down
by pulling high its FB pin (i.e., when an input power rail shuts
down as a result of entering a sleep state, the affected
regulator’s FB pin has to be pulled high). This measure is
necessary in order to avoid possible damage to the ISL6432 as
a result of overheating. Overheating can occur in such
situations due to sheer power dissipation inside the chip’s
output linear drivers.
Component Selection Guidelines
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general, the output capacitors should be
selected to meet the dynamic regulation requirements.
Additionally, the PWM converters require an output capacitor
to filter the current ripple. The load transient for the
microprocessor core requires high quality capacitors to supply
the high slew rate (di/dt) current demands.
PWM Output Capacitors
Modern microprocessors produce transient load rates above
1A/ns. High frequency capacitors initially supply the transient
current and slow the load rate-of-change seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (effective series resistance) and
voltage rating requirements rather than actual capacitance
requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
FN9019 Rev 0.00
Jun 1, 2001
Use only specialized low-ESR capacitors intended for switching-
regulator applications for the bulk capacitors. The bulk
capacitor’s ESR determines the output ripple voltage and the
initial voltage drop following a high slew-rate transient’s edge.
An aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance (ESL) of these
capacitors increases with case size and can reduce the
usefulness of the capacitor to high slew-rate transient loading.
Unfortunately, ESL is not a specified parameter. Work with your
capacitor supplier and measure the capacitor’s impedance with
frequency to select a suitable component. In most cases,
multiple electrolytic capacitors of small case size perform better
than a single large case capacitor.
Linear Output Capacitors
The output capacitors for the linear regulators provide dynamic
load current. The linear controllers use dominant pole
compensation integrated into the error amplifier and are
insensitive to output capacitor selection. Output capacitors
should be selected for transient load regulation.
PWM Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converter’s response time to a load
transient. The inductor value determines the converter’s ripple
current and the ripple voltage is a function of the ripple current.
The ripple voltage and current are approximated by the
following equations:
I
=
V-----I--N-----–----V-----O----U----T--
FS L
-V----O----U----T--
VIN
VOUT = I ESR
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values increase
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL6432 will provide either 0% or 100% duty cycle in response
to a load transient. The response time is the time interval
required to slew the inductor current from an initial current
value to the post-transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitor(s).
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the application
of load and the removal of load. The following equations give
the approximate response time interval for application and
removal of a transient load:
tRISE = -VL---O-I--N-----–---I-V-T---R-O----AU---N-T--
tFALL
=
L----O----------I--T----R----A----N--
VOUT
where: ITRAN is the transient load current step, tRISE is the
response time to the application of load, and tFALL is the
response time to the removal of load. Be sure to check both of
Page 9 of 12

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