ISL6292D Просмотр технического описания (PDF) - Renesas Electronics
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ISL6292D Datasheet PDF : 13 Pages
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ISL6292D
The following events initiate a new charge cycle:
• POR,
• a new battery being inserted (detected by TEMP pin),
• the battery voltage drops below a recharge threshold after
completing a charge cycle,
• recovery from an battery over-temperature fault,
• or, the EN pin is toggled from GND to floating.
Further description of these events are given later in this data
sheet.
Recharge
After a charge cycle completes, charging is prohibited until the
battery voltage drops to a recharge threshold, VRECHRG (see
Electrical Specifications). Then a new charge cycle starts at
point t6 and ends at point t8, as shown in Figure 4. The safety
timer is reset at t6.
Internal Oscillator
The internal oscillator establishes a timing reference. The
oscillation period is programmable with an external timing
capacitor, CTIME, as shown in Typical Applications. The
oscillator charges the timing capacitor to 1.5V and then
discharges it to 0.5V in one period, both with 10A current. The
period TOSC is:
TOSC = 0.2 106 CTIME
sec onds
(EQ. 3)
A 1nF capacitor results in a 0.2ms oscillation period. The
accuracy of the period is mainly dependent on the accuracy of
the capacitance and the internal current source.
Total Charge Time
The total charge time for the CC mode and CV mode is limited
to a length of TIMEOUT. A 22-stage binary counter increments
each oscillation period of the internal oscillator to set the
TIMEOUT. The TIMEOUT can be calculated as:
TIMEOUT = 222 TOSC= 14 -C---1-T---n-I--M-F---E--
minutes
(EQ. 4)
A 1nF capacitor leads to 14 minutes of TIMEOUT. For
example, a 15nF capacitor sets the TIMEOUT to be 3.5 hours.
The charger has to reach the end-of-charge condition before
the TIMEOUT, otherwise, a TIMEOUT fault is issued. The
TIMEOUT fault latches up the charger. There are two ways to
release such a latch-up: either to recycle the input power, or
toggle the EN pin to disable the charger and then enable it
again.
The trickle mode charge has a time limit of 1/8 TIMEOUT. If the
battery voltage does not reach VMIN within this limit, a
TIMEOUT fault is issued and the charger latches up. The
charger stays in trickle mode for at least 15 cycles of the
internal oscillator and, at most, 1/8 of TIMEOUT, as shown in
Figure 4.
Disabling TIMEOUT Limit
The TIMEOUT limit for the fast charge modes can be disabled
by pulling the TOEN pin to LOW or shorting it to GND. When
this happens, the charger becomes a current-limited LDO (low-
dropout) supply with its voltage regulated at the final charge
voltage VCH and the current limit determined by the IREF pin.
If the LDO load current drops below the end-of-charge current
(refer to End-of-Charge section), the STAT1 and the STAT2 pin
will indicate.
The trickle charge time limit, however, is not disabled even
when the TOEN pin is pulled to LOW. The charger operates in
the trickle mode at the beginning of a charge cycle even if the
TIMEOUT is disabled. Leaving the TOEN pin floating is
recommended to enable the TIMEOUT. Driving the TOEN pin
above 3.0V is not recommended.
Charge Current Programming
The charge current is programmed by the IREF pin. There are
three ways to program the charge current:
1. driving the IREF pin above 1.3V
2. driving the IREF pin below 0.4V,
3. or using the RIREF as shown in the Typical Applications.
The voltage of IREF is regulated to a 0.8V reference voltage
when not driven by any external source. The charging current
during the constant current mode is 100,000 times that of the
current in the RIREF resistor. Hence, depending on how IREF
pin is used, the charge current is,
500 m A
IREF=
-R--0--I-.-R-8---E-V---F-- 105A
100 m A
VIREF 1.3V
RIREF
VIREF 0.4V
(EQ. 5)
The 500mA current is a guaranteed maximum value for high-
power USB port, with the typical value of 450mA. The 100mA
current is also a guaranteed maximum value for the low-power
USB port. This design accommodates the USB power
specification.
The internal reference voltage at the IREF pin is capable of
sourcing less than 100A current. When pulling down the IREF
pin with a logic circuit, the logic circuit needs to be able to sink
at least 100A current.
When the adapter is current limited, it is recommended that the
reference current be programmed to at least 30% higher than
the adapter current limit (which equals the charge current). In
addition, the charge current should be at least 350mA so that
the voltage difference between the VIN and the VBAT pins is
higher than 100mV. The 100mV is the offset voltage of the
input-output voltage comparator shown in the block diagram.
FN9166 Rev.0.00
July 2004
Page 9 of 13
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