AD1895YRS Просмотр технического описания (PDF) - Analog Devices
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AD1895YRS Datasheet PDF : 24 Pages
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AD1895–SPECIFICATIONS
TEST CONDITIONS UNLESS OTHERWISE NOTED
Supply Voltages
VDD_CORE
3.3 V
VDD_IO
5.0 V or 3.3 V
Ambient Temperature
25°C
Input Clock
30.0 MHz
Input Signal
1.000 kHz, 0 dBFS
Measurement Bandwidth 20 to fS_OUT/2 Hz
Word Width
24 Bits
Load Capacitance
50 pF
Input Voltage HI
2.4 V
Input Voltage LO
0.8 V
Specifications subject to change without notice.
DIGITAL PERFORMANCE (VDD_CORE = 3.3 V ؎ 5%, VDD_IO = 5.0 V ؎ 10%)
Parameter
Min
Typ
Max
Resolution
Sample Rate @ MCLK_I = 30 MHz
Sample Rate (@ Other Master Clocks)1
Sample Rate Ratios
Upsampling
Downsampling
Dynamic Range2
(20 Hz to fS_OUT/2, 1 kHz, –60 dBFS Input) A-Weighted
44.1 kHz: 48 kHz
48 kHz: 44.1 kHz
48 kHz: 96 kHz
44.1 kHz: 192 kHz
96 kHz: 48 kHz
192 kHz: 32 kHz
(20 Hz to fS_OUT/2, 1 kHz, –60 dBFS Input) No Filter
44.1 kHz: 48 kHz
48 kHz: 44.1 kHz
48 kHz: 96 kHz
44.1 kHz: 192 kHz
96 kHz: 48 kHz
192 kHz: 32 kHz
Total Harmonic Distortion + Noise2
(20 Hz to fS_OUT/2, 1 kHz, 0 dBFS Input) No Filter
Worst-Case (48 kHz:96 kHz)3
44.1 kHz: 48 kHz
48 kHz: 44.1 kHz
48 kHz: 96 kHz
44.1 kHz: 192 kHz
96 kHz: 48 kHz
192 kHz: 32 kHz
Interchannel Gain Mismatch
Interchannel Phase Deviation
Mute Attenuation (24 Bits Word Width)
24
6
215
MCLK_I/5000 ≤ fS_OUT ≤ MCLK_I/138
1:8
7.75:1
128
128
128
128
127
127
125
125
125
125
124
124
–115
–120
–119
–118
–120
–122
–122
0.0
0.0
–127
NOTES
1Lower sampling rates than given by this formula are possible, but the jitter rejection will decrease.
2Refer to the Typical Performance Characteristics section for DNR and THD+N numbers over wide range of Input and Output Sample Rates.
3For any other ratio, minimum THD+N will be better than –115 dB. Please refer to detailed performance plots.
Specifications subject to change without notice.
Unit
Bits
kHz
kHz
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Degrees
dB
–2–
REV. A
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