EL7551CU-T7 Просмотр технического описания (PDF) - Renesas Electronics
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EL7551CU-T7 Datasheet PDF : 9 Pages
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EL7551
EL7551
Layout Considerations
The layout is very important for the converter to function
properly. Power Ground ( ) and Signal Ground ( )
should be separated to ensure that the high pulse current in
the Power Ground never interferes with the sensitive signals
connected to Signal Ground. They should only be connected
at one point (normally at the negative side of either the input
or output capacitor.)
The trace connected to pin 14 (FB) is the most sensitive
trace. It needs to be as short as possible and in a “quiet”
place, preferably between PGND or SGND traces.
In addition, the bypass capacitor connected to the VDD pin
needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the PGND
pins. Maximizing the copper area around these pins is
preferable. In addition, a solid ground plane is always helpful
for the EMI performance.
The demo board is a good example of layout based on these
principles. Please refer to the EL7551 Application Brief for
the layout.
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FN7291 Rev 1.00
March 21, 2006
Page 9 of 9
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