DS26334 Просмотр технического описания (PDF) - Maxim Integrated

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DS26334

3.3V, 16-Channel, E1/T1/J1 Short- and Long-Haul Line Interface Unit

Maxim Integrated 

DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit

LIST OF TABLES

Table 4-1. Pin Descriptions .................................................................................................................................. 10

Table 5-1. Parallel Port Mode Selection and Pin Functions................................................................................... 18

Table 5-2. Telecommunications Specification Compliance for DS26334 Transmitters........................................... 21

Table 5-3. Registers Related to Control of DS26334 Transmitters ........................................................................ 21

Table 5-4. Template Selections for Short-Haul Mode............................................................................................ 22

Table 5-5. Template Selections for Long-Haul Mode ............................................................................................ 22

Table 5-6. LIU Front-End Values.......................................................................................................................... 26

Table 5-7. Loss Criteria ANSI T1.231, ITU-T G.775, and ETS 300 233 Specifications .......................................... 28

Table 5-8. AIS Criteria ANSI T1.231, ITU-T G.775, and ETS 300 233 Specifications ............................................ 29

Table 5-9. AIS Detection and Reset Criteria for DS26334..................................................................................... 29

Table 5-10. Registers Related to AIS Detection.................................................................................................... 30

Table 5-11. BPV, Code Violation, and Excessive Zero Error Reporting................................................................. 30

Table 5-12. Pseudorandom Pattern Generation ................................................................................................... 35

Table 5-13. Repetitive Pattern Generation............................................................................................................ 35

Table 6-1. Primary Register Set ........................................................................................................................... 40

Table 6-2. Secondary Register Set....................................................................................................................... 41

Table 6-3. Individual LIU Register Set .................................................................................................................. 42

Table 6-4. BERT Register Set.............................................................................................................................. 43

Table 6-5. Primary Register Set Bit Map .............................................................................................................. 44

Table 6-6. Secondary Register Set Bit Map.......................................................................................................... 45

Table 6-7. Individual LIU Register Set Bit Map ..................................................................................................... 46

Table 6-8. BERT Register Bit Map ....................................................................................................................... 47

Table 6-9. G.772 Monitoring Control (LIU 1)......................................................................................................... 54

Table 6-10. G.772 Monitoring Control (LIU 9)....................................................................................................... 54

Table 6-11. TST Template Select Transmitter Register (LIUs 1–8) ....................................................................... 59

Table 6-12. TST Template Select Transmitter Register (LIUs 9–16) ..................................................................... 59

Table 6-13. Template Selection............................................................................................................................ 60

Table 6-14. Address Pointer Bank Selection ........................................................................................................ 63

Table 6-15. DS26334 MCLK Selections ............................................................................................................... 69

Table 6-16. Receiver Sensitivity/Monitor Mode Gain Selection ............................................................................. 75

Table 6-17. Receiver Signal Level........................................................................................................................ 76

Table 6-18. Bit Error Rate Transceiver Select for Channels 1–8 ........................................................................... 80

Table 6-19. Bit Error Rate Transceiver Select for Channels 9–16 ......................................................................... 80

Table 6-20. PLL Clock Select............................................................................................................................... 83

Table 6-21. Clock A Select................................................................................................................................... 83

Table 7-1. Instruction Codes for IEEE 1149.1 Architecture ................................................................................... 96

Table 7-2. ID Code Structure ............................................................................................................................... 97

Table 7-3. Device ID Codes ................................................................................................................................. 97

Table 8-1. Recommended DC Operating Conditions ............................................................................................ 98

Table 8-2. Pin Capacitance.................................................................................................................................. 98

Table 8-3. DC Characteristics .............................................................................................................................. 98

Table 9-1. Transmitter Characteristics.................................................................................................................. 99

Table 9-2. Receiver Characteristics...................................................................................................................... 99

Table 9-3. Intel Read Mode Characteristics........................................................................................................ 100

Table 9-4. Intel Write Cycle Characteristics........................................................................................................ 103

Table 9-5. Motorola Read Cycle Characteristics................................................................................................. 106

Table 9-6. Motorola Write Cycle Characteristics ................................................................................................. 109

Table 9-7. Serial Port Timing Characteristics...................................................................................................... 112

Table 9-8. Transmitter System Timing................................................................................................................ 113

Table 9-9. Receiver System Timing.................................................................................................................... 114

Table 9-10. JTAG Timing Characteristics ........................................................................................................... 115

Table 12-1. Thermal Characteristics................................................................................................................... 118

Table 12-2. Package Power Dissipation (for Thermal Considerations)................................................................ 118

Table 12-3. Per-Channel Power-Down Savings (for Thermal Considerations)..................................................... 119

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