DS2196 Просмотр технического описания (PDF) - Maxim Integrated
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DS2196 Datasheet PDF : 157 Pages
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DS2196
TABLE OF CONTENTS
1 INTRODUCTION................................................................................................................................ 6
1.1 FEATURE HIGHLIGHTS.................................................................................................................. 6
1.2 TYPICAL APPLICATIONS............................................................................................................. 10
1.3 FUNCTIONAL DESCRIPTION....................................................................................................... 10
2 PIN DESCRIPTION .......................................................................................................................... 10
3 PIN FUNCTION DESCRIPTION.................................................................................................... 13
4 REGISTER MAP............................................................................................................................... 21
5 PARALLEL PORT............................................................................................................................ 27
6 CONTROL, ID, AND TEST REGISTERS ..................................................................................... 27
7 STATUS AND INFORMATION REGISTERS ............................................................................ 51
8 ERROR COUNT REGISTERS....................................................................................................... 64
9 SIGNALING OPERATION.............................................................................................................. 68
10 DS0 MONITORING FUNCTION .................................................................................................. 70
11 PER–CHANNEL CODE (IDLE) GENERATION AND LOOPBACK ..................................... 72
11.1 TRANSMIT SIDE CODE GENERATION .................................................................................. 72
11.2 RECEIVE SIDE CODE GENERATION...................................................................................... 73
12 PROGRAMMABLE IN–BAND CODE GENERATION AND DETECTION ......................... 74
13 CLOCK BLOCKING REGISTERS.............................................................................................. 83
14 TRANSMIT TRANSPARENCY.................................................................................................... 85
15 BERT FUNCTION .......................................................................................................................... 86
15.1 BERT REGISTER DESCRIPTION.............................................................................................. 88
16 ERROR INSERTION FUNCTION ............................................................................................... 96
17 HDLC CONTROLLER .................................................................................................................. 99
17.1 HDLC FOR DS0S ......................................................................................................................... 100
18 FDL/FS EXTRACTION AND INSERTION .............................................................................. 101
18.1 HDLC AND BOC CONTROLLER FOR THE FDL.................................................................. 101
18.1.1 General Overview ................................................................................................................. 101
18.1.2 Status Register for the HDLC............................................................................................... 103
18.1.3 Basic Operation Details ........................................................................................................ 103
18.1.4 HDLC/BOC Register Description ........................................................................................ 105
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