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CAT24C208(2009) Просмотр технического описания (PDF) - ON Semiconductor

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Компоненты Описание
производитель
CAT24C208
(Rev.:2009)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
CAT24C208 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
CAT24C208
WORD OFFSET
START
1010 0000
ACK A7 A0 ADDRESS ACK START 1010 0001 ACK
Figure 6. Random Access Read (Segment 00h only)
WORD OFFSET
DATA
NOACK
STOP
START 1010 0000 ACK A7 A0 ADDRESS ACK START 1010 0001 ACK DATA0 ACK ......... DATAN NOACK STOP
Figure 7. Sequential Read (Segment 00h only)
Figures 8 and 9 show the byte and page write respectively. The configuration register must have the WE bit set to 1 prior
to any write on DDC Port. Only the segment 00h can be accessed of either lower or upper bank.
WORD OFFSET
START
1010 0000
ACK
A7 A0 ADDRESS
ACK
DATA
ACK
STOP
Figure 8. Byte Write (Segment 00h only)
WORD OFFSET
START 1010 0000 ACK
A7 A0 ADDRESS
ACK DATA0 ACK .........
Figure 9. Page Write (Segment 00h only)
DATA15 ACK STOP
The segment pointer is at the address 60h and is
writeonly. This means that a memory access at 61h will
give undefined results. The segment pointer is a volatile
register. The device configuration register at 62/63 (hex) is
a nonvolatile register. The configuration register will be
shipped in the erased (set to FFh) state.
The segment pointer is used to expand the available DDC
address space while maintaining backward compatibility
with older DDC interfaces such as DDC2B. For each value
of the 8bit segment pointer one segment (256 bytes) is
available at the A0/A1 pair. The standard DDC 8bit address
is sufficient to address each of the 256 bytes within a
segment. Note that if the segment pointer is set to 00h then
the device will behave like a standard DDC2B EEPROM.
Read and write with segment pointer can expand the
addressable memory to 512 bytes in each bank with
wraparound to the next segment in the same bank only. The
two banks can be individually selected by the configuration
register and EDID Sel pin, as shown in Table 10. The
segments are selected by the two bits S1S0 = 00 or 01 in the
segment address.
Figures 10 to 13 show the random read, sequential read,
byte write and page write.
START
START
0110 0000
1010 0000
ACK
ACK
xxxx xxS1S0 Segment ADDRESS
A7 A0 ADDRESS
ACK
ACK START 1010 0001 ACK DATA NOACK STOP
Figure 10. Random Access Read
START 0110 0000 ACK xxxx xxS1S0 Segment ADDRESS ACK
START 1010 0000 ACK A7 A0 ADDRESS ACK START 1010 0001 ACK DATA0 ACK ......... DATAN NOACK STOP
Figure 11. Sequential Read
START 0110 0000 ACK xxxx xxS1S0 Segment ADDRESS ACK
START 1010 0000 ACK A7 A0 ADDRESS
ACK
DATA
ACK
STOP
Figure 12. Byte Write
START 0110 0000 ACK xxxx xxS1S0 Segment ADDRESS
START 1010 0000 ACK A7 A0 ADDRESS ACK
ACK
DATA0 ACK
......... DATA15 ACK
STOP
Figure 13. Page Write
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