HS3120B-0 Просмотр технического описания (PDF) - API Technologies Corp
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HS3120B-0 Datasheet PDF : 3 Pages
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HS3120
SPECIFICATIO N S
(Typical @ 25ºC, nominal power supply, VREF=+10V, unipolar unless otherwise noted).
M ODEL
HS3120-2
TY PE
M ULTIPLY ING, DOUBLE BUFFERED INPUTS
DIGITAL INPUT
R e so l u t i o n
2-Quad. Unipolar Coding
4-Quad. Bipolar Coding
Logic Compatibility2
Input Current
Data Set-up Time3
Strobe W idth3
Data Hold Time3
12-Bits
Binary1, Comp. Binary1
Offset Binary
CM OS, TTL
±1 µA (max)
250nS (min)
250nS (min)
OnS (min)
REFERENCE INPUT
Voltage Range
Input Impedance
±25V (max)
8k ±50%
ANALOG OUTPUT
Scale Factor
Scale Factor A ccuracy4
Output Leakage5
@25ºC
@125ºC
Output Capacitance
COUT 1, all inputs high
COUT 1, all inputs low
COUT 2, all inputs high
COUT 2, all inputs low
STATIC PERFORM ANCE
125µA /V Ref ±50%
±0.4%
<10nA (max)
<200nA (max)
80pF
40pF
40pF
80pF
Integral Linearity
Differential Linearity
M onotonicity
M onotonicity Temp. Range
C-M odels
B-M odels
±0.015% F.S.R. (max)
±0.024% F.S.R. (max)
Guaranteed to 12 bits
0ºC to +70ºC
–55ºC to +125ºC
DY NAM IC PERFORM ANCE
Digital Small Signal Settling
Full Scale Transition Settling
to 0.01% (strobed)
Reference Feedthrough Error (V Ref=20V pp)
@1kHz
@10kHz
Delay to output
from Bits input
from LDAC
from CE
1 . 0 µ se c
2 . 0 µ se c
<1mV
2mV
100nS6
200nS6
120nS6
STA BILITY (Over Specified Temp. Range)
Scale Factor4
Integral Linearity
Differential Linearity
M onotonicity Temp. Range
C-Option
B-Option
2 ppm F.S.R./ºC (max)
0.2 ppm F.S.R./ºC (max)
0.2 ppm F.S.R./ºC (max)
0ºC to +70ºC
–55ºC to +125ºC
POW ER SUPPLY (VDD)
Operating V oltage (specifications guaranteed)
M aximum Voltage Range
Current
Rejection Ratio
+15V ±5%
+5V to 16V
2.5mA (max)
0.002% /% (max)
TEM PERATURE RANGE
Operating C-Option
Operating B-Option
Storage
0ºC to +70ºC
55ºC to +125ºC
–65ºC to +150ºC
M ECHANICAL
Case Style
28-pin double DIP
C-Option
ce r a m i c
B-Option
ce r a m i c
N O T E S:
* Same as HS 3120-2
1. The input coding is complementary binary if IO2 is used.
2. Digital input voltage must not exceed supply voltage or go below –0.5V . “ 0” <0.8V , 2.4V < “ 1” V DD
3. A ll strobes are level triggered. See TIM ING DIA GRA M .
4. Using the internal feedback resistor and an external opamp.
5. The output leakage current will create an offset voltage at the external opamps output. It doubles every 10ºC temperature increase.
6. Delay times are twice the amount shown at TA =+125ºC
HS 3120-0
±0.05% F.S.R. (max)
±0.097% F.S.R. (max)
Guaranteed to 10 bits
Continued on next page.
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