AS5C4009ECJ-100/IT Просмотр технического описания (PDF) - Micross Components
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AS5C4009ECJ-100/IT Datasheet PDF : 12 Pages
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SRAM
AS5C4009
CAPACITANCE
PARAMETER
Input Capacitance
Input/Output Capactiance
CONDITIONS
TA = 25oC, f = 1MHz
VCC = 5V
VIN=0V
VIO=0V
SYMBOL MAXIMUM
CIN
8
CIO
10
UNITS
pF
pF
NOTES
4
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
DESCRIPTION
-55
-70
-85
-100
SYM MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
READ Cycle
READ cycle Time
t RC
55
70
85
100
ns
Address access time
t AA
55
70
85
100 ns
Chip Enable access time
t ACE
55
70
85
100 ns
Output hold from address change t OH
10
10
10
10
ns
Chip Enable to output in Low-Z
t LZCE
10
10
10
10
ns
4,6
Chip disable to output in High-Z
t HZCE
20
25
30
30 ns
4,6
Chip Enable to power-up time
t PU
0
0
0
0
ns
4
Chip disable to power-down time
t PD
55
70
85
100 ns
4
Output Enable access time
t AOE
30
35
40
45 ns
Output Enable to output in Low-Z t LZOE
5
5
5
5
ns
4,6
Output disable to output in High-Z t HZOE
20
25
30
30 ns
4,6
WRITE Cycle
WRITE cycle time
t WC
55
70
85
100
ns
Chip Enable to end of write
t CW
50
60
70
80
ns
Address valid to end of write
t AW
50
60
70
80
ns
Address setup time
t AS
0
0
0
0
ns
Address hold from end of write
t AH
0
0
0
0
ns
WRITE pulse width
t WP1
50
60
70
80
ns
Data setup time
t DS
30
30
35
40
ns
Data hold time
t DH
0
0
0
0
ns
Write disable to output in Low-Z t LZWE
5
5
5
5
ns
4,6
Write Enable to output in High-Z t HZWE
25
25
30
30 ns
4,6
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
4
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