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FXL4TD245

Low-Voltage Dual-Supply 4-Bit Signal Translator with Configurable Voltage Supplies and Signal Levels and 3-STATE Outputs and Independent Direction Controls

ON Semiconductor 

AC Loading and Waveforms

TEST

SIGNAL

VCC

DUT

Rtr1

CL

RL

OPEN

GND

VCC x 2

tPLH, tPHL

tPZH, tPHZ

tPZL, tPLZ

Test

tPLH, tPHL

tPLZ, tPZL

tPHZ, tPZH

Switch

OPEN

VCCO x 2 at VCCO = 3.3 ± 0.3V, 2.5V ± 0.2V,

1.8V ± 0.15V, 1.5V ± 0.1V, 1.2V ± 0.1V

GND

Figure 1. AC Test Circuit

AC Load Table

VCCO

CL

RL

Rtr1

1.2V ± 0.1V

15pF

2kΩ

2kΩ

1.5V ± 0.1V

15pF

2kΩ

2kΩ

1.8V ± 0.15V

15pF

2kΩ

2kΩ

2.5V ± 0.2V

15pF

2kΩ

2kΩ

3.3V ± 0.3V

15pF

2kΩ

2kΩ

DATA

IN

tpxx

DATA

OUT

Vmi

tpxx

VCCI

GND

Vmo VCCO

Input tR = tF = 2.0 ns, 10% to 90%

Input tR = tF = 2.5ns, 10% to 90%, @ VI = 3.0V to 3.6V only

Figure 2. Waveform for Inverting

and Non-Inverting Functions

OUTPUT

CONTROL

tPZL

DATA

OUT

Vmi

tPLZ

Vmo

VCCA

GND

VY

VOL

Input tR = tF = 2.0 ns, 10% to 90%

Input tR = tF = 2.5ns, 10% to 90%, @ VI = 3.0V to 3.6V only

Figure 3. 3-STATE Output Low Enable

and Disable Times for Low Voltage Logic

OUTPUT

CONTROL

DATA

OUT

tPZH

Vmi

tPHZ

Vmo

VCCA

GND

VOH

VX

Input tR = tF = 2.0 ns, 10% to 90%

Input tR = tF = 2.5ns, 10% to 90%, @ VI = 3.0V to 3.6V only

Figure 4. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

Symbol

3.3V ± 0.3V

2.5V ± 0.2V

VCC

1.8V ± 0.15V

Vmi

VCCI / 2

VCCI / 2

VCCI / 2

Vmo

VCCO / 2

VCCO / 2

VCCO / 2

VX

VOH − 0.3V

VOH − 0.15V

VOH − 0.15V

VY

VOL + 0.3V

VOL + 0.15V

VOL + 0.15V

For Vmi: VCCI = VCCA for Control Pins T/R and OE, or VCCA / 2

1.5V ± 0.1V

VCCI / 2

VCCO / 2

VOH − 0.1V

VOL + 0.1V

1.2V ± 0.1V

VCCI / 2

VCCO / 2

VOH − 0.1V

VOL + 0.1V

©2006 Fairchild Semiconductor Corporation

FXL4TD245 • Rev. 1.0.6

9

www.fairchildsemi.com

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