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MP8040

High Current Integrated Half Bridge + Driver

Monolithic Power Systems 

TM

MP8040 – HIGH CURRENT INTEGRATED HALF BRIDGE + DRIVER

PIN FUNCTIONS

Pin #

1

2

3

4

5

6

7

8

Name

PWM

SP

SW

GND

BS

SHDN

DRV

FLT

Description

Driver Logic Input. Drive PWM with the signal that controls the MP8040 output. Drive PWM

high to turn on the high-side switch; drive PWM low to turn on the low-side switch.

Power Supply Input. Connect SP to the positive side of the input power supply. Bypass SP

to GND as close to the IC as possible.

Switched Output. SW is the power output of the MP8040. Connect the output LC filter to

SW. SW is valid approximately 100µs after SP goes high.

Ground. (Note: Connect the exposed pad on the bottom side to Pin 4).

Bootstrap Supply. BS powers the high-side gate of the MP8040. Connect a 0.1µF or

greater capacitor between BS and SW.

Shutdown Input. SHDN enables/disables the MP8040. Drive SHDN low to turn on the

MP8040, drive it high to turn it off. If not used, connect SHDN to GND.

Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from

SP. DRV powers the internal circuitry and internal MOSFET gate drives. Bypass DRV to

GND with a 0.1µF to 10µF capacitor.

Fault Output. Active-low, open drain. A low output at FLT indicates that the MP8040 has

detected a fault and has shutdown. Connect FLT to DRV through a 100kΩ resistor.

OPERATION

The MP8040 is a general purpose, power

driver. It takes a logic input and drives a half

bridge comprised of 0.1Ω high-side and

low-side N-Channel MOSFET switches.

It operates at frequencies up to 1.2MHz, can

accept a DC supply voltage as high as 25V,

and produce peak output current as high as 9A.

INTERNAL

5V REG.

DRV 7

DBS

BS

UVLO

CURRENT

LIMIT &

FEEDBACK

THERMAL

SHUTDOWN

UVLO

HI DRIVE

5 BS

2 SP

PWM 1

LOGIC

3 SW

FLT 8

SHDN 6

LO DRIVE

4 GND

MP8040 Rev. 1.5

5/3/2005

Figure 1—Function Block Diagram

www.MonolithicPower.com

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© 2005 MPS. All Rights Reserved.

MP8040_F02

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