EN5339QI Просмотр технического описания (PDF) - Altera Corporation

Номер в каталоге

Компоненты Описание

производитель

EN5339QI

3A PowerSoC Low Profile Synchronous Buck DC-DC Converter with Integrated Inductor

Altera Corporation 

EN5339QI

PIN

12

13

14

15

16

17

18

19-20

25,26

NAME

TST0

NC

VFB

AGND

AVIN

POK

ENABLE

PVIN

PGND

FUNCTION

Test Pin. For Altera internal use only. Connect to AVIN at all times.

NO CONNECT: This pin must be soldered to PCB but not electrically connected to any other

pin or to any external signal, voltage, or ground. This pin may be connected internally. Failure

to follow this guideline may result in device damage.

This is the external feedback input pin. A resistor divider connects from the output to AGND.

The mid-point of the resistor divider is connected to VFB. A feed-forward capacitor is

required parallel to the upper feedback resistor (RA). The output voltage regulation is based

on the VFB node voltage equal to 0.600V.

The quiet ground for the control circuits. Connect to the ground plane with a via right next to

the pin.

Analog input voltage for the control circuits. Connect this pin to the input power supply (PVIN)

at a quiet point. Decouple with a 1uF capacitor to AGND.

POK is an open drain output. Refer to Power OK section for details. Leave POK open if

unused.

Output Enable. A logic high level on this pin enables the output and initiates a soft-start. A

logic low signal disables the output and discharges the output to GND. This pin must not be

left floating.

Input power supply. Connect to input power supply and place input filter capacitor(s) between

these pins and PGND pins 2 to 3.

Not a perimeter pin. Device thermal pad to be connected to the system GND plane for heat-

sinking purposes. See Layout Recommendation section.

06903

June 26, 2015

www.altera.com/enpirion, Page 3

Rev E

Share Link: