HI5660(1999) Просмотр технического описания (PDF) - Intersil
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HI5660 Datasheet PDF : 11 Pages
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HI5660
Absolute Maximum Ratings
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to ACOM . . . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM. . -0.3V To +0.3V Digital Input Voltages
(D9-D0, CLK, SLEEP) . . . . . . . . . . . . . . . . . . . . . . . . . DVDD + 0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . . ±50µA
Reference Input Voltage Range . . . . . . . . . . . . . . . . . . AVDD + 0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA(oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
117
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
SYSTEM PERFORMANCE
Resolution
Integral Linearity Error, INL
Differential Linearity Error, DNL
Offset Error, IOS
Offset Drift Coefficient
AVDD = DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values
TA = -40oC TO 85oC
TEST CONDITIONS
MIN TYP MAX
“Best Fit” Straight Line (Note 7)
(Note 7)
(Note 7)
(Note 7)
8
-0.5
-0.5
-0.025
-
-
±0.25
±0.25
0.1
-
+0.5
+0.5
+0.025
-
Full Scale Gain Error, FSE
Full Scale Gain Drift
With External Reference (Notes 2, 7)
With Internal Reference (Notes 2, 7)
With External Reference (Note 7)
-10
±2
+10
-10
±1
+10
-
±50
-
With Internal Reference (Note 7)
-
±100
-
Full Scale Output Current, IFS
Output Voltage Compliance Range
(Note 3)
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, fCLK
Output Settling Time, (tSETT)
(Notes 3, 9)
0.8% (±1 LSB, equivalent to 7 Bits) (Note 7)
0.4% (±1/2 LSB, equivalent to 8 Bits) (Note 7)
Singlet Glitch Area (Peak Glitch)
Output Rise Time
RL = 25Ω (Note 7)
Full Scale Step
Output Fall Time
Full Scale Step
Output Capacitance
Output Noise
IOUTFS = 20mA
IOUTFS = 2mA
AC CHARACTERISTICS HI5660/16IB, HI5660/16IA - 165MHz
Spurious Free Dynamic Range,
SFDR Within a Window
fCLK = 165MSPS, fOUT = 66.7MHz, 50MHz Span (Notes 4, 7, 9)
fCLK = 165MSPS, fOUT = 20.2MHz, 30MHz Span (Notes 4, 7, 9)
fCLK = 125MSPS, fOUT = 32.9MHz, 10MHz Span (Notes 4, 7)
fCLK = 100MSPS, fOUT = 5.04MHz, 4MHz Span (Notes 4, 7)
2
-
20
-0.3
-
1.25
125
-
-
-
5
-
-
15
-
-
5
-
-
1.5
-
-
1.5
-
10
-
50
-
-
30
-
-
60
-
-
69
-
-
70
-
-
73
-
UNITS
Bits
LSB
LSB
% FSR
ppm
FSR/oC
% FSR
% FSR
ppm
FSR/oC
ppm
FSR/oC
mA
V
MHz
ns
ns
pV•s
ns
ns
pF
pA/ √Hz
pA/ √Hz
dBc
dBc
dBc
dBc
3
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