CRD4525 Просмотр технического описания (PDF) - Cirrus Logic

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CRD4525

30 W Digital TV Amplifier with Integrated ADC

Cirrus Logic 

CS4525

Figure 18.Foldback Process ..................................................................................................................... 39

Figure 19.2-Channel Full-Bridge PWM Output Delay ............................................................................... 46

Figure 20.3-Channel PWM Output Delay .................................................................................................. 46

Figure 21.Typical SYS_CLK Input Clocking Configuration ....................................................................... 49

Figure 22.Hardware Mode PWM Output Delay ......................................................................................... 50

Figure 23.Hardware Mode Digital Signal Flow .......................................................................................... 51

Figure 24.Foldback Process ..................................................................................................................... 52

Figure 25.Output Filter - Half-Bridge ......................................................................................................... 54

Figure 26.Output Filter - Full-Bridge .......................................................................................................... 55

Figure 27.Recommended Unity Gain Input Filter ...................................................................................... 56

Figure 28.Recommended 2 VRMS Input Filter ........................................................................................... 56

Figure 29.I²S Serial Audio Formats ........................................................................................................... 57

Figure 30.Left-Justified Serial Audio Formats ........................................................................................... 57

Figure 31.Right-Justified Serial Audio Formats ......................................................................................... 58

Figure 32.Control Port Timing, I²C Write ................................................................................................... 59

Figure 33.Control Port Timing, I²C Read ................................................................................................... 59

LIST OF TABLES

Table 1. I/O Power Rails ........................................................................................................................... 12

Table 2. Bass Shelving Filter Corner Frequencies .................................................................................... 31

Table 3. Treble Shelving Filter Corner Frequencies ................................................................................. 32

Table 4. Bass Management Cross-Over Frequencies .............................................................................. 35

Table 5. 2-Way Cross-Over Frequencies .................................................................................................. 41

Table 6. Auxiliary Serial Port Data Output ................................................................................................ 42

Table 7. PWM Power Output Configurations ............................................................................................ 43

Table 8. PWM Logic-Level Output Configurations .................................................................................... 44

Table 9. PWM Output Switching Rates and Quantization Levels ............................................................. 47

Table 10. SYS_CLOCK Frequency Selection ........................................................................................... 49

Table 11. Input Source Selection .............................................................................................................. 50

Table 12. Serial Audio Interface Format Selection .................................................................................... 50

Table 13. Thermal Foldback Enable Selection ......................................................................................... 52

Table 14. PWM Output Switching Rates and Quantization Levels ........................................................... 53

Table 15. Low-Pass Filter Components - Half-Bridge ............................................................................... 54

Table 16. DC-Blocking Capacitors Values - Half-Bridge ........................................................................... 54

Table 17. Low-Pass Filter Components - Full-Bridge ............................................................................... 55

Table 18. Input Source Selection .............................................................................................................. 60

DS726A1

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