SM1350AAQM Просмотр технического описания (PDF) - Nippon Precision Circuits

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SM1350AAQM

High Tone Quality Melody IC

Nippon Precision Circuits  

S0 to S3 chattering prevention function

SM1350AAQM

In binary select mode, S0 to S3 are sampled in sync with the 15.26Hz clock during level-hold melody output. The

chatter prevention function compares the data sampled 65.5ms after a data transition on S0 to S3 with the data sampled

65.5ms before the data transition. If the 2 data samples are the same, then the data transition is considered invalid.

However, if they are not the same indicating a true transition has occurred, melody output stops and only restarts again

after 2 consecutive identical melody select data samples occur. Note that except for binary select mode with level hold

output, the S0 to S3 chattering prevention circuit is disabled.

15.26Hz

S0 to S3 #N

#N

Melody Output

(SP pin)

#N

65.5

ms

#M

#S

#M

#S

65.5 65.5

ms ms

65.5 65.5 65.5

ms ms ms

Figure 3. S0～S3 chattering prevention timing

Initialization

When power on and ICN goes LOW, all pins and internal states are initialized to the states shown below. It is

recommended to initialize before melody output for steady operation.

■ Output pins

• SP, SPN : Open

• ENDN

• CT

• BUSYN

: VDD

: VSS

: VDD

■ Serial melody counter

Reset to first melody (S0 to S3 all 0)

■ Oscillator circuit

Stopped

SEIKO NPC CORPORATION - 8

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