UT62W256CLS-35L(2001) Просмотр технического описания (PDF) - Utron Technology Inc

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производитель

UT62W256CLS-35L
(Rev.:2001)

32K X 8 BIT LOW POWER CMOS SRAM

Utron Technology Inc 



Rev. 1.0

UTRON

UT62W256C

32K X 8 BIT LOW POWER CMOS SRAM

DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃)

PARAMETER

SYMBOL

Vcc for Data Retention VDR

Data Retention Current IDR

Chip Disable to Data

Retention Time

Recovery Time

tRC* = Read Cycle Time

tCDR

tR

TEST CONDITION

CE ≧ VCC-0.2V

Vcc=1.5V

CE ≧ VCC-0.2V

See Data Retention

Waveforms (below)

DATA RETENTION WAVEFORM

VCC

CE

2.7V

tCDR

Data Retention Mode

VDR ≧ 1.5V

MIN.

1.5

-L -

- LL -

0

TYP.

-

1

0.5

-

MAX.

5.5

20

10

-

UNIT

V

µA

µA

ns

tRC*

-

-

ns

2.7V

tR

VSS

CE ≧ VCC -0.2V

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

6

P80069

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