MAX3674 Просмотр технического описания (PDF) - Microsemi Corporation
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MAX3674 Datasheet PDF : 20 Pages
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High-Performance, Dual-Output,
Network Clock Synthesizer
Table 6. Post-PLL Divider NA
NA2
0
1
0
1
0
1
NA1
0
0
1
1
0
0
NA0
0
0
0
0
1
1
fOUT (QA)
DEFAULT
VALUE
fVCO / 2
fVCO / 4
fVCO / 8
fVCO / 16
fVCO / 32
fVCO / 64
—
—
010
—
—
—
Table 7. Output NB Divider Setting
NB INPUT
0
1
QB DIVIDER OUTPUT
FREQUENCY
RATIO
fQB (MHz)
1
fQB = fQA
2
fQB = fQA / 2
DEFAULT
VALUE
0
—
For a given reference frequency fREF (fXTAL), the PLL
feedback divider M must be configured to match the
specified VCO frequency range (1360MHz to
2720MHz) to achieve a valid PLL configuration. For
example, with fREF = 16MHz and P = 4, M has a valid
value between 340 and 680.
f VCO
=
fREF
P
×M
1360 ≤ f VCO ≤ 2720
Invalid PLL configuration leads to VCO frequencies
beyond the specified lock range and can result in loss
of lock. M is chosen to be between 136 and 725 for the
whole reference frequency range, 15MHz to 20MHz.
The smallest possible change in the output frequency
is the synthesizer granularity G (difference in fOUT
when incrementing or decrementing M). G is a function
of fREF and dividers P, NA, and NB. The MAX3674 typi-
cally provides a resolution of less than 1% for granulari-
ty G. See Table 8.
G = fREF
P × N A,B
The purpose of the PLL predivider P is to scale the ref-
erence frequency for operations within the PLL. The
setting for P affects the generator output frequency
granularity and PLL loop bandwidth. For a given output
frequency, P = 4 results in a finer (smaller) output fre-
quency granularity, G, and a smaller PLL bandwidth
compared to the P = 2 setting.
Table 8 shows an example of the output frequency res-
olution at different output frequencies, assuming a
16MHz reference clock is used.
Table 8. Frequency Ranges (fREF = 16MHz)
fOUT (QA) (MHz)
NA
M
P
MIN
MAX
680
1360
170–340 2
2
340–680 4
340
680
170–340 2
4
340–680 4
170
340
170–340 2
8
340–680 4
170–340 2
85
170
16
340–680 4
42.5
85
170–340 2
32
340–680 4
G
(MHz)
4
2
2
1
1
0.5
0.5
0.25
0.25
0.125
21.25 42.5
170–340 2
64
340–680 4
0.125
0.0625
Example of Output Frequency Configuration
The following steps provide an example of how to
determine the appropriate settings for P, M, NA, and
NB given that a 16MHz reference (fREF) is available
and the desired output frequency (fOUT) is 500MHz
with fine granularity (P = 4).
1) Determine the output divider setting for NA that
provides an output frequency range that encom-
passes the desired output frequency. According
to Table 8, the desired frequency of 500MHz falls
into the fOUT range of 340MHz–680MHz, requiring
NA = 4.
2) Calculate the VCO frequency:
f VCO = fOUT × NA
In this case, fOUT = 500MHz, NA = 4, giving fVCO
= 500MHz × 4 = 2000MHz.
3) Determine the setting for the feedback divider M:
M = f VCO × P
fREF
The finest granularity is obtained with P = 4, and in
this case corresponds to 1MHz (see Table 8). The
value for M is then calculated as M = (2000MHz /
16MHz) × 4 = 500.
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