Standard
Load
Output
CL
3.15V
R1
Thevenin
Equivalent
Output
R2
VL
RL
CL
Figure 8 - PEEL™ Device and Array Test Loads
Technology
CMOS
TTL
Ordering Information
Part Number
PEEL18LV8ZP-25 (L)
PEEL18LV8ZPI-35 (L)
PEEL18LV8ZJ-25 (L)
PEEL18LV8ZJI-35 (L)
PEEL18LV8ZS-25 (L)
PEEL18LV8ZSI-35 (L)
PEEL18LV8ZT-25 (L)
PEEL18LV8ZTI-35 (L)
Part Number
R1
284 kΩ
308 Ω
R2
258 kΩ
433 Ω
RL
113 kΩ
180 Ω
Speed
25ns
35ns
25ns
35ns
25ns
35ns
25ns
35ns
Temperature
Commercial
Industrial
Commercial
Industrial
Commercial
Industrial
Commercial
Industrial
Device
Suffix
PEELTM18LV8Z PI-35X
VL
1.275V
1.840V
CL
33 pF
33 pF
Package
20-pin Plastic DIP
20-pin Plastic DIP
20-pin PLCC
20-pin PLCC
20-pin SOIC
20-pin SOIC
20-pin TSSOP
20-pin TSSOP
Package
P = 20-pin Plastic 300 mil DIP
J = 20-pin Plastic (J) Leaded Chip Carrier (PLCC)
S = 20-pin SOIC 300 mil Gullwing
T = 20-pin TSSOP 170mil
Speed
-25 = 25ns tpd
-35 = 35ns tpd
Temperature Range
(Blank) = Commercial 0 to 70oC
I = Industrial -40 to 85oC
Lead Free
Blank : Normal
L : Lead Free Package
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Dec 16, 2004
9/10