HC2510C Просмотр технического описания (PDF) - Hynix Semiconductor

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HC2510C

Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications

Hynix Semiconductor 

HC2510C

Table 3. Recommended Operating Conditions

Symbol

AVCC

VIH

VIL

VI

IOH

IOL

TA

Parameter

Supply Voltage

High-level Input Voltage

Low-level Input Voltage

Input Voltage

High-level Output Current

Low-level Output Current

Operating Free-air Temperature

Value

Min Max

3

3.6

2

0.8

0

VCC

-12

12

0

85

Unit

V

V

V

V

mA

mA

°C

Condition

Table 4. Electrical Characteristics Over Recommended Operating Free-air

Temperature Range

Symbol

VIK

VOH

Value

Min

Typ

Vcc-0.2

2.1

2.4

VOL

II

ICC

∆ ICC

Ci

4

Co

6

Max

-1.2

0.2

0.8

0.55

±5

10

500

Unit

V

V

V

µA

µA

µA

pF

pF

AVCC (V)

3

Min to Max

3

3

Min to Max

3

3

3.6

3.6

3.3 to 3.6

3.3

3.3

Test Conditions

II = -18mA

IOH = -100µA

IOH = -12 mA

IOH = -6 mA

IOL =100 mA

IOL = 12 mA

IOL = 6 mA

VI =VCC or GND

VI =VCC or GND, IO = 0,

Ouputs: low or high

One input at VCC - 0.6V,

Other Inputs at VCC or GND

VI = VCC or GND

VO = VCC or GND

Table 5.Timing Requirements Over Recommended Ranges of Supply Voltage

and Operating free-air Temperature

Symbol

fclock

Parameter

Clock Frequency

Input Clock Duty Cycle

Stabilization Time♣

Value

Min

Max

25

125

40

60

1

Unit

MHz

%

ms

♣ Time to obtain phase lock of its feedback signal to its reference signal.

4

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