NX25P40-VNI Просмотр технического описания (PDF) - NexFlash -> Winbond Electronics
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NX25P40-VNI
NexFlash -> Winbond Electronics
NX25P40-VNI Datasheet PDF : 28 Pages
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1M / 2M / 4M-BIT SERIAL FLASH MEMORY with 40MHz SPI
NX25P10, NX25P20 AND NX25P40
Table 10. AC Electrical Characteristics (Preliminary)
Symbol Alt Description
Min
FR
fC Clock frequency, for Fast Read (0Bh) and all other
instructions except Read Data (03h) 2.7V-3.6V Vcc
D.C.
3.0V-3.6V Vcc
D.C.
fR
tCLH, tCLL(1)
tCRLH, tCRLL(1)
tCLCH(2)
tCHCL(2)
tSLCH
tCSS
tCHSL
tDVCH
tDSU
tCHDX
tDH
tCHSH
tSHCH
tSHSL
tCSH
tSHQZ(2)
tDIS
tCLQV
tV
tCLQX
tHO
tHLCH
tCHHH
tHHCH
tCHHL
tHHQX(2)
tLZ
tHLQZ(2)
tHZ
tWHSL(4)
tSHWL(4)
tDP(2)
tRES1(2)
tRES2(2)
Clock freq. Read Data instruction (03h) 2.7V-3.6V Vcc
D.C.
3.0V-3.6V Vcc
D.C.
Clock High, Low Time, for Fast Read (0Bh)
11
and all other instructions except Read Data (03h)
Clock High, Low Time for Read Data instruction (20 / 33-40MHz) 18 / 11
Clock Rise Time peak to peak
0.1
Clock Fall Time peak to peak
0.1
CS Active Setup Time relative to CLK (20 / 33-40MHz)
10 / 5
CS Not Active Hold Time relative to CLK (20 / 33-40MHz)
10 / 5
Data In Setup Time (20 / 33-40MHz)
5/2
Data In Hold Time
5
CS Active Hold Time relative to CLK (20 / 33-40MHz)
10 / 5
CS Not Active Setup Time relative to CLK (20 / 33-40MHz)
10 / 5
CS Deselect Time
100
Output Disable Time (20 / 33-40MHz)
Clock Low to Output Valid (20 / 33-40MHz)
Output Hold Time
0
HOLD Active Setup Time relative to CLK (20 / 33-40MHz)
10 / 5
HOLD Active Hold Time relative to CLK (20 / 33-40MHz)
10 / 5
HOLD Not Active Setup Time relative to CLK (20 / 33-40MHz) 10 / 5
HOLD Not Active Hold Time relative to CLK (20 / 33-40MHz) 10 / 5
HOLD to Output Low-Z (20 / 33-40MHz)
HOLD to Output High-Z (20 / 33-40MHz)
Write Protect Setup Time Before CS Low
20
Write Protect Hold Time After CS High
100
CS High to Power-down Mode
CS High to Standby Mode without Electronic
Signature Read
CS High to Standby Mode with Electronic
Signature Read
tW
Write Status Register Cycle Time
tPP
Page Program Cycle Time
tSE
Sector Erase Cycle Time
tBE
Bulk Erase Cycle Time 25P10 and 25P20
Bulk Erase Cycle Time 25P40
Typ Max
33
40
20
33
15 / 9
15 / 10
15 / 9
20 / 9
3
3
1.8
10 15
2
5
0.7 3
3
6
5 10
Unit
MHz
MHz
MHz
MHz
ns
ns
V / ns
V / ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
ms
ms
s
s
s
Notes:
1. Clock high + Clock low must be less than or equal to 1/fC.
2. Value guaranteed by design and/or characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for a Write Status Register instruction when Sector Protect Bit is set at 1.
24
NexFlash Technologies, Inc.
PRELIMINARY MKP-0009 Rev 6 NXSF040I-0405
04/04/05 ©
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