MAX525ACAP Просмотр технического описания (PDF) - Maxim Integrated

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MAX525ACAP

Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial Interface

Maxim Integrated 

Low-Power, Quad, 12-Bit Voltage-Output DAC

with Serial Interface

CS

SCLK

DIN

DOUT

(MODE 0)

DOUT

(MODE 1)

COMMAND

EXECUTED

1

8

9

16

A1

A0 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

DATA PACKET (N)

A1

A0 C1 C0 D11 D10 D9 D8 D7

D6 D5 D4 D3 D2 D1 D0 A1

MSB FROM

PREVIOUS WRITE

DATA PACKET (N-1)

DATA PACKET (N)

A1 A0 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A1

MSB FROM

PREVIOUS WRITE

DATA PACKET (N-1)

DATA PACKET (N)

Figure 5. Serial-Interface Timing Diagram

CS

SCLK

DIN

DOUT

tCSO

tCSS

tDS tDH

tCH

tCL

tCSW

tCP

tCSH

tCS1

tDO1 tDO2

Figure 6. Detailed Serial-Interface Timing Diagram

Power-Down Lockout (PDL)

The power-down lockout pin PDL disables software

shutdown when low. When in shutdown, transitioning

PDL from high to low wakes up the part with the output

set to the state prior to shutdown. PDL could also be

used to asynchronously wake up the device.

Daisy Chaining Devices

Any number of MAX525s can be daisy chained by con-

necting the DOUT pin of one device to the DIN pin of

the following device in the chain (Figure 7).

Since the MAX525’s DOUT pin has an internal active

pull-up, the DOUT sink/source capability determines

the time required to discharge/charge a capacitive

load. Refer to the serial-data-out VOH and VOL specifi-

cations in the Electrical Characteristics.

Figure 8 shows an alternate method of connecting sev-

eral MAX525s. In this configuration, the data bus is

common to all devices; data is not shifted through a

daisy chain. More I/O lines are required in this configu-

ration because a dedicated chip-select input (CS) is

required for each IC.

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