LD3985 Просмотр технического описания (PDF) - STMicroelectronics

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производитель

LD3985

Ultra low drop-low noise BiCMOS voltage regulators low ESR capacitors compatible

STMicroelectronics 

Pin configuration

2

Pin configuration

LD3985xx

Figure 2. Pin connections (top view for SOT and TSOT, top through view for Flip-chip)

SOT23-5L/TSOT23-5L

Flip-chip

Table 2. Pin description

Pin n° for

SOT23-5L/

TSOT23-5L

Pin n° for

Flip-chip

Symbol

Name and function

1

4

VI

Input voltage of the LDO

2

2

GND Common ground

3

1

VINH

Inhibit input voltage: ON MODE when VINH ≥ 1.2 V, OFF MODE when VINH

≤ 0.4 V (Do not leave floating, not internally pulled down/up)

4

5

BYPASS

Bypass pin: connect an external capacitor (usually 10 nF) to minimize

noise voltage

5

3

VO

Output voltage of the LDO

4/23

Doc ID 9587 Rev 14

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