FSA9285A Просмотр технического описания (PDF) - ON Semiconductor
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FSA9285A Datasheet PDF : 28 Pages
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5. Interrupt Operation
The baseband processor recognizes interrupt signals by
observing the INTB signal, which is active LOW. Interrupts are
masked upon reset via the INT Mask register bit (bit 0 of
Control register, address 02h in Table 6 of the I2C register map)
and INTB pin defaults HIGH. After the INT Mask bit is cleared
by the baseband processor, the INTB pin is generally driven
HIGH (INTB is not an open-drain output) in preparation for a
future interrupt. The INTB remains HIGH until the INTB mask is
cleared. If the Interrupt Mask bit in the I2C Control register is
written LOW when an interruptible event occurs, INTB
transitions LOW and returns HIGH when the processor reads
the Interrupt register at addresses 03h.
6. Analog Switch Descriptions
The FSA9285A has a three-port data switch, providing routing
capability to two data ports and one audio port. The two data
switches are high bandwidth to provide high-speed USB 2.0
“eye” compliance. These switches also operate full-swing for
full-speed USB and UART signals up to 4.4 V.
The high-performance negative-swing-capable audio switch
utilizes a termination resistor for audio pop reduction. The audio
configuration also provides for routing a microphone signal from
a headset. The MIC signals can be routed to either the VBUS_IN
pin for stereo audio configurations or the DP_CON pin for mono
audio configurations that also allow simultaneous charging over
the VBUS line.
7. Accessory Detection
In Standby Mode, after power-up or reset, the FSA9285A
monitors the VBUS_IN and ID_CON pins for any connectivity
using very low power (see “Battery Supply Standby Mode
Current” in the Switch Path DC Electrical Characteristics
section). To minimize standby power, many functional blocks
are powered down until an accessory attach is detected. The
VBUS_IN detection recognizes if the voltage on VBUS_IN is within
the valid range (>4.0 V). For resistance to GND on the ID_CON
pin, the FSA9285A measures voltage with an injected current
to determine this resistance. All accessories attached or
detached are reported to the processor via the Interrupt
register. Any changes of resistance on the ID_CON pin are
reported as a Resistor_Change interrupt. Additional information
about the accessory is reported in the Device Type, Resistor
Code, and Status registers. For USB accessories without an
ID_CON resistance, a VBUS_Valid Change interrupt is reported to
signal an attach or detach condition. Status of VBUS_Valid and
ID_CON resistance is always available after any interrupt.
The USB detection flow is show in Figure 5. Note that the INTB
Mask bit in the Control register must be cleared after a reset or
power-up before interrupts can be signaled by the FSA9285A.
Individual Interrupt Masks bits can be enabled by writing the
Interrupt Mask register (see Table 6).
ID_CON resistor detection is accomplished in a little more than
three times the “Resistor Detection Time,” where Resistor
Detection Time bits are programmable in the Timing Set
register. The FSA9285A is designed to allow up to 1 nF
capacitance on the ID_CON pin. ID_CON is short-circuit
protected from a faulty resistor or an accidental short where the
current is limited to 5 mA sourced by the FSA9285A.
The detection of a VBUS_IN goes through the USB detection flow
only once. VBUS_IN must be removed before the USB detection
state machine reverts to its initial state.
After an initial attach, the FSA9285A continuously monitors the
ID pin for changes and reports those changes to the baseband
processor. To provide the fastest response for changes in
button checking after initial attach, the FSA9285A indicates a
change in ID_CON resistor after two samples are taken instead
of the three consecutive samples taken on initial attach. To
save power, the resistor detection block can be disabled after
an initial attach with the ID_DIS bit in the Control register. The
resistor detection block is normally disabled when no ID_CON
resistance is present (ID_CON floating) to save power. The
condition of ID_FLOAT continues to be monitored regardless of
the ID_DIS setting.
Whenever a resistance is measured on ID_CON, the USB
discovery state machine halts after completion of its current
state and the ID_CON state machine continues for accessory
detection. The only exception is when an ACA RID-A accessory
is detected. In this case, the USB discovery state machine is
used to differentiate between a docking station and a powered
A-device attached to a docking station (per USB Battery
Charging Specification 1.2).
If the EN_MAN_SW bit is set on attach, FSA9285A configures
the switches to the state in the MANUAL SW register.
Upon the removal of any accessory, the FSA9285A detects and
indicates a change in ID_CON resistance (regardless of ID_DIS
bit setting), a removal of VBUS_IN, or both. The FSA9285A
automatically opens all switches (and VBUS FET) on detach
(ID_FLOAT and VBUS not valid), even if the FSA9285A is set to
Manual Switching Mode.
For the weak battery case, the FSA9285A needs to be in
Automatic Switching Mode. Should the processor NOT be able
to respond to INTB, FSA9285A must be placed in Automatic
Switching Mode explicitly or VDDIO must be removed, resetting
the FSA9285A state to its default values.
Note: If the FSA9285A is to be used in automatic switching
mode (EN_MAN_SW = 0) then the Manual SW register must
be configured for all switches OPEN).
© 2011 Fairchild Semiconductor Corporation
FSA9285A • Rev. 1.3
6
www.fairchildsemi.com
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