AS5SS256K18DQ-9/XT Просмотр технического описания (PDF) - Micross Components

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AS5SS256K18DQ-9/XT

256K x 18 SSRAM Synchronous Burst SRAM, Flow-Through

Micross Components 

SSRAM

AS5SS256K18

INTERLEAVED BURST ADDRESS TABLE (MODE=NC OR HIGH)

FIRST ADDRESS (EXTERNAL) SECOND ADDRESS (INTERNAL) THIRD ADDRESS (INTERNAL) FOURTH ADDRESS (INTERNAL)

X…X00

X…X01

X…X10

X…X11

X…X01

X…X00

X…X11

X…X10

X…X10

X…X11

X…X00

X…X01

X…X11

X…X10

X…X01

X…X00

LINEAR BURST ADDRESS TABLE (MODE=LOW)

FIRST ADDRESS (EXTERNAL) SECOND ADDRESS (INTERNAL) THIRD ADDRESS (INTERNAL) FOURTH ADDRESS (INTERNAL)

X…X00

X…X01

X…X10

X…X11

X…X01

X…X10

X…X11

X…X00

X…X10

X…X11

X…X00

X…X01

X…X11

X…X00

X…X01

X…X10

PARTIAL TRUTH TABLE FOR WRITE COMMANDS

FUNCTION

GW\ BWE\ BWa\ BWb\

READ

H

H

X

X

READ

H

L

H

H

WRITE Byte "a"

H

L

L

H

WRITE Byte "b"

H

L

H

L

WRITE All Bytes

H

L

L

L

WRITE All Bytes

L

X

X

X

NOTE: Using BWE\ and BWa\ through BWb\, any one or more bytes may be

written.

18

SA0, SA1, SA

MODE

ADV\

CLK

ADSC\

ADSP\

BWb\

BWa\

BWE\

GW\

CE\

CE2

CE2\

OE\

FUNCTIONAL BLOCK DIAGRAM

18

ADDRESS

16

18

REGISTER

2 SA0-SA1

Q1

BINARY

COUNTER AND

SA1'

LOGIC

CLR

Q0

SA0'

BYTE "b"

WRITE REGISTER

BYTE "a"

WRITE REGISTER

ENABLE

REGISTER

9

BYTE "b"

9

WRITE DRIVER

9

BYTE "a"

9

256K x 9 x 2

MEMORY

ARRAY

18 SENSE 18 OUTPUT

AMPS

BUFFERS

18

WRITE DRIVER

DQs

DQPa

DQPb

18

INPUT

REGISTERS

2

NOTE: The Functional Block Diagram illustrates simplified device operation. See Truth Table, pin descriptions and timing

diagrams for detailed information.

AS5SS256K18

Rev. 2.5 10/13

Micross Components reserves the right to change products or specifications without notice.

3

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