74HC132-Q100 Просмотр технического описания (PDF) - NXP Semiconductors.
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74HC132-Q100 Datasheet PDF : 19 Pages
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Nexperia
74HC132-Q100; 74HCT132-Q100
Quad 2-input NAND Schmitt trigger
Symbol Parameter
Conditions
74HCT132-Q100
tpd
propagation delay nA, nB to nY; see Figure 6
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 6
CPD
power dissipation per package;
capacitance
VI = GND to VCC - 1.5 V
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑ (CL × VCC2 × fo) = sum of outputs.
25 °C
−40 °C to +125 °C Unit
Min
Typ
Max Max
Max
(85 °C) (125 °C)
[1]
-
-
[2]
-
[3]
-
20
33
41
50 ns
17
-
-
- ns
7
15
19
22 ns
20
-
-
- pF
11.1 Waveforms and test circuit
VI
nA, nB input
GND
VOH
nY output
VOL
VM
tPHL
VY
tTHL
VM
VX
tPLH
tTLH
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 6. Input to output propagation delays
001aai814
Table 8. Measurement points
Type
Input
VM
74HC132-Q100
0.5VCC
74HCT132-Q100
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
VY
0.9VCC
0.9VCC
74HC_HCT132_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 June 2018
© Nexperia B.V. 2018. All rights reserved.
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