CY7C1061DV33-10BV1XI Просмотр технического описания (PDF) - Cypress Semiconductor

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производитель

CY7C1061DV33-10BV1XI

16-Mbit (1 M × 16) Static RAM

Cypress Semiconductor 

CY7C1061DV33

Capacitance

Parameter [6]

Description

CIN

COUT

Input Capacitance

I/O Capacitance

Test Conditions

TA = 25 C, f = 1 MHz, VCC = 3.3 V

54-pin TSOP II 48-ball VFBGA Unit

6

8

pF

8

10

pF

Thermal Resistance

Parameter [6]

Description

JA

Thermal resistance

(junction to ambient)

JC

Thermal resistance

(junction to case)

Test Conditions

54-pin TSOP II 48-ball VFBGA Unit

Still air, soldered on a 3 × 4.5 inch, four

layer printed circuit board

24.18

28.37

C/W

5.40

5.79

C/W

AC Test Loads and Waveforms

Figure 5. AC Test Loads and Waveforms [7]

Output

Z0 = 50 

(a)

* Capacitive Load Consists

of all Components of the

Test Environment

50 

30 pF*

VTH = 1.5 V

3.0 V

90%

GND

10%

Rise Time:

> 1 V/ns

All Input Pulses

(c)

High-Z Characteristics:

3.3 V

R1 317 

Output

5 pF*

Including

JIG and

Scope

(b)

R2

351

90%

10%

Fall Time:

> 1 V/ns

Notes

6. Tested initially and after any design or process changes that may affect these parameters.

7.

Valid

VDD,

SRAM operation does not occur

normal SRAM operation begins

until the power supplies have

including reduction in VDD to

reached

the data

trheetemntiinoinm(uVmCCoDpRe,ra2t.i0ngVV) DvoDlt(a3g.0e.V).

100

s

(tpower)

after

reaching

the

minimum

operating

Document Number: 38-05476 Rev. *H

Page 6 of 17

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