MCX18LG0A Просмотр технического описания (PDF) - Sony Semiconductor

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MCX18LG0A

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Sony Semiconductor 

MCX18LG0A/MCX18LG0B

(CL = 20pF, within recommended operating range)

Classification

Item

Symbol Min. Typ. Max. Unit

XCLR

Minimum low interval

TWCLR 500 — — ns

RESETTG

Minimum low interval

TWRST 35 — — ns

SCK input pulse width (high interval)

TWHSCK 430 — — ns

SCK input pulse width (low interval)

TWLSCK 430 — — ns

XCS input setup time, activated by the falling edge of SCK TSUXCS 430 — — ns

XCS input hold time, activated by the rising edge of SCK THXCS 640 — — ns

Serial

SI input setup time, activated by the rising edge of SCK TSUSI

communication SI input hold time, activated by the rising edge of SCK THSI

140 — — ns

140 — — ns

SO output transition time (Hi-Z → Data active),

activated by the falling edge of XCS

TZDSO 70 — 200 ns

SO transition time (Data active → Hi-Z),

activated by the rising edge of XCS

TDZSO 70 — 200 ns

SO output delay time, activated by the falling edge of SCK TPDSO 70 — 240 ns

YO0 to 7 output delay time, activated by the falling edge

of DCK

TPDYO

7

ns

Digital output

CO0 to 7 output delay time, activated by the falling edge

of DCK

TPDCO

7

ns

NRB output delay time, activated by the falling edge of

DCK

TPDNRB

7

ns

XCS

SCK

SO

SI

YO0 to 7

CO0 to 7

NRB

TSUXCS

TWLSCK TWHSCK

TZDSO

DATA

TSUSI THSI

DATA

TPDSO

DATA

DATA

TpdYO

TpdCO

TpdNRB

THXCS

TDZSO

DATA

DATA

DCK

–7–

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