SST30VR021 Просмотр технического описания (PDF) - Silicon Storage Technology
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SST30VR021 Datasheet PDF : 12 Pages
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2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM
ROM/RAM Combo
SST30VR021 / SST30VR022 / SST30VR023
Data Sheet
II. SRAM Operation (ROMCS# = VIH)
TABLE 6: READ CYCLE TIMING PARAMETERS VDD = 3.0V±0.3
SST30VR022-70
Symbol Parameter
Min
Max
TRC
Read Cycle Time
70
TAA
Address Access Time
70
TCO
Chip Select to Output
70
TOE
Output Enable to Valid Output
35
TLZ
Chip Select to Low-Z Output
0
THZ
Chip Disable to High-Z Output
25
TOHZ
Output Disable to High-Z Output
25
TOH
Output Hold from Address Change
10
TABLE 7: WRITE CYCLE TIMING PARAMETERS VDD = 3.0V±0.3
SST30VR022-70
Symbol Parameter
Min
Max
TWC
TCW
TAW
TAS
TWP
TWR
TWHZ
TDW
TDH
TOW
Write Cycle Time
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
70
60
60
0
60
0
30
30
0
0
SST30VR021/023-500
Min
Max
500
500
500
250
25
30
30
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
T6.2 380
SST30VR021/023-500
Min
Max
500
365
375
0
375
0
80
200
0
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T7.1 380
©2001 Silicon Storage Technology, Inc.
7
S71135-02-000 4/01 380
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