SST30VR021 Просмотр технического описания (PDF) - Silicon Storage Technology

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SST30VR021

2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo

Silicon Storage Technology 

2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM

ROM/RAM Combo

SST30VR021 / SST30VR022 / SST30VR023

Data Sheet

AC CHARACTERISTICS

I. ROM Operation

TABLE 5: READ CYCLE TIMING PARAMETERS VDD = 3.0V±0.3

SST30VR022-70

Symbol Parameter

Min

Max

TRC

TAA

TCO

TOE

TLZ

TOLZ

THZ

TOHZ

TOH

Read Cycle Time

Address Access Time

Chip Select to Output

Output Enable to Valid Output

Chip Select to Low-Z Output

Output Enable to Low-Z Output

Chip Disable to High-Z Output

Output Disable to High-Z Output

Output Hold from Address Change

70

70

70

35

0

0

25

25

10

SST30VR021/023-500

Min

Max

500

500

500

250

25

25

30

30

15

Units

ns

ns

ns

ns

ns

ns

ns

ns

ns

T5.1 380

Address

Data Out

TRC

TAA

TOH

Previous Data Valid

Data Valid

380 ILL F02.0

FIGURE 4: ROM READ CYCLE TIMING DIAGRAM (ADDRESS CONTROLLED) (ROMCS# = OE# = VIL)

©2001 Silicon Storage Technology, Inc.

5

S71135-02-000 4/01 380

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