MC100LVEL11MNR4 Просмотр технического описания (PDF) - ON Semiconductor
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MC100LVEL11MNR4 Datasheet PDF : 8 Pages
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MC100LVEL11
ORDERING INFORMATION
Device
Package
Shipping†
MC100LVEL11D
SOIC−8
98 Units / Rail
MC100LVEL11DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC100LVEL11DR2
SOIC−8
2500 Tape & Reel
MC100LVEL11DR2G
SOIC−8
(Pb−Free)
2500 Tape & Reel
MC100LVEL11DT
TSSOP−8
100 Units / Rail
MC100LVEL11DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC100LVEL11DTR2
TSSOP−8
2500 Tape & Reel
MC100LVEL11DTR2G
TSSOP−8
(Pb−Free)
2500 Tape & Reel
MC100LVEL11MNR4
DFN8
1000 / Tape & Reel
MC100LVEL11MNR4G
DFN8
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
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