XD010-24S-D2F Просмотр технического описания (PDF) - RF Micro Devices
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XD010-24S-D2F Datasheet PDF : 6 Pages
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XD010-24S-D2F(Y)
Pin
1
2
3, 4
5
Flange
Function
RFIN
VD1
VD2
RFOUT
GND
Description
Module RF input. Care must be taken to protect against video transients that may damage the active devices.
This is the bias feed for the first stage of the amplifier module. The gate bias is temperature compensated to maintain
constant current over the operating temperature range. See Note 1.
This is the bias feed for the second stage of the amplifier module. The gate bias is temperature compensated to main-
tain constant current over the operating temperature range. See Note 1.
Module RF output. Care must be taken to protect against video transients that may damage the active devices.
Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for
optimum thermal and RF performance. See mounting instructions for recommendation
Note 1: The internally generated gate voltage is thermally compensated to maintain constant quiescent current over the
temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can
only be accomplished with AGC external to the module.
S Note 2: Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
N applications may require energy storage on the drain leads to accommodate time-varying waveforms.
IG Note 3: This module was designed to have its leads hand soldered to an adjacent PCB. The maximum soldering iron tip
temperature should not exceed 700° F, and the soldering iron tip should not be in direct contact with the lead for longer
S than 10 seconds. Refer to app note AN060 (www.RFMD.com) for further installation instructions.
DE Test Board Layout
NOT FOR NEW
4 of 6
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
EDS-102932 Rev G
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