A29L800A Просмотр технического описания (PDF) - AMIC Technology
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A29L800A Datasheet PDF : 36 Pages
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Autoselect Mode
The autoselect mode provides manufacturer and device
identification, through identifier codes output on I/O7 - I/O0.
This mode is primarily intended for programming equipment to
automatically match a device to be programmed with its
corresponding programming algorithm. However, the
autoselect codes can also be accessed in-system through the
command register.
When using programming equipment, the autoselect mode
requires VID (11.5V to 12.5 V) on address pin A9. Address pins
A6, A1, and A0 must be as shown in Autoselect Codes (High
Voltage Method) table. In addition, when verifying sector
protection, the sector address must appear on the appropriate
A29L800A Series
highest order address bits. Refer to the corresponding Sector
Address Tables. The Command Definitions table shows the
remaining address bits that are don't care. When all necessary
bits have been set as required, the programming equipment
may then read the corresponding identifier code on I/O7 -
I/O0.To access the autoselect codes in-system, the host
system can issue the autoselect command via the command
register, as shown in the Command Definitions table. This
method does not require VID. See "Command Definitions" for
details on using the autoselect mode.
Table 4. A29L800A Autoselect Codes (High Voltage Method)
Description
Mode CE OE WE A18 A11 A9 A8 A6 A5 A1 A0 I/O8
I/O7
to to
to
to
to
to
A12 A10
A7
A2
I/O15
I/O0
Manufacturer ID: AMIC
L
L
H
X
X VID X L X L L
X
37h
Device ID:
Word
B3h
1Ah
A29L800A
L
L
H
X
X VID X L X L H
(Top Boot Block)
Byte
X
1Ah
Device ID:
Word
B3h
9Bh
A29L800A
L
L
H
X
X VID X L X L H
(Bottom Boot Block) Byte
X
9Bh
Continuation ID
L
L
H
X
X VID X L X H H
X
7Fh
L=Logic Low= VIL, H=Logic High=VIH, SA=Sector Address, X=Don’t Care.
Note: The autoselect codes may also be accessed in-system via command sequences.
Hardware Data Protection
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table). In
addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
VCC power-up transitions, or from system noise. The device is
powered up to read array data to avoid accidentally writing
data to the array.
Write Pulse "Glitch" Protection
Noise pulses of less than 5ns (typical) on OE , CE or WE do
not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE =VIL, CE
= VIH or WE = VIH. To initiate a write cycle, CE and WE
must be a logical zero while OE is a logical one.
Power-Up Write Inhibit
If WE = CE = VIL and OE = VIH during power up, the device
does not accept commands on the rising edge of WE . The
internal state machine is automatically reset to reading array
data on the initial power-up.
(June, 2005, Version 1.1)
9
AMIC Technology, Corp.
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